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[PULL 1/9] hw/arm/virt: Check bypass iommu is not set for iommu-map DT p
From: |
Peter Maydell |
Subject: |
[PULL 1/9] hw/arm/virt: Check bypass iommu is not set for iommu-map DT property |
Date: |
Mon, 16 Jun 2025 15:06:22 +0100 |
From: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
default_bus_bypass_iommu tells us whether the bypass_iommu is set
for the default PCIe root bus. Make sure we check that before adding
the "iommu-map" DT property.
Cc: qemu-stable@nongnu.org
Fixes: 6d7a85483a06 ("hw/arm/virt: Add default_bus_bypass_iommu machine option")
Suggested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Reviewed-by: Donald Dutile <ddutile@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20250602114655.42920-1-shameerali.kolothum.thodi@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/virt.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9a6cd085a37..99fde5836c9 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1487,9 +1487,12 @@ static void
create_virtio_iommu_dt_bindings(VirtMachineState *vms)
qemu_fdt_setprop_cell(ms->fdt, node, "phandle", vms->iommu_phandle);
g_free(node);
- qemu_fdt_setprop_cells(ms->fdt, vms->pciehb_nodename, "iommu-map",
- 0x0, vms->iommu_phandle, 0x0, bdf,
- bdf + 1, vms->iommu_phandle, bdf + 1, 0xffff - bdf);
+ if (!vms->default_bus_bypass_iommu) {
+ qemu_fdt_setprop_cells(ms->fdt, vms->pciehb_nodename, "iommu-map",
+ 0x0, vms->iommu_phandle, 0x0, bdf,
+ bdf + 1, vms->iommu_phandle, bdf + 1,
+ 0xffff - bdf);
+ }
}
static void create_pcie(VirtMachineState *vms)
@@ -1612,8 +1615,10 @@ static void create_pcie(VirtMachineState *vms)
switch (vms->iommu) {
case VIRT_IOMMU_SMMUV3:
create_smmu(vms, vms->bus);
- qemu_fdt_setprop_cells(ms->fdt, nodename, "iommu-map",
- 0x0, vms->iommu_phandle, 0x0, 0x10000);
+ if (!vms->default_bus_bypass_iommu) {
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "iommu-map",
+ 0x0, vms->iommu_phandle, 0x0, 0x10000);
+ }
break;
default:
g_assert_not_reached();
--
2.43.0
- [PULL 0/9] target-arm queue, Peter Maydell, 2025/06/16
- [PULL 2/9] tests/functional: Add a test for the realview-eb-mpcore machine, Peter Maydell, 2025/06/16
- [PULL 1/9] hw/arm/virt: Check bypass iommu is not set for iommu-map DT property,
Peter Maydell <=
- [PULL 7/9] hw/intc/arm_gic: introduce a first-cpu-index property, Peter Maydell, 2025/06/16
- [PULL 5/9] docs/interop: convert qed_spec.txt to reStructuredText format, Peter Maydell, 2025/06/16
- [PULL 3/9] qemu-options.hx: Fix reversed description of icount sleep behavior, Peter Maydell, 2025/06/16
- [PULL 9/9] linux-user/arm: Fix return value of SYS_cacheflush, Peter Maydell, 2025/06/16
- [PULL 6/9] hw/arm: make cpu targeted by arm_load_kernel the primary CPU., Peter Maydell, 2025/06/16
- [PULL 4/9] target/arm: Define raw write for PMU CLR registers, Peter Maydell, 2025/06/16
- [PULL 8/9] hw/arm/mps2: Configure the AN500 CPU with 16 MPU regions, Peter Maydell, 2025/06/16
- Re: [PULL 0/9] target-arm queue, Stefan Hajnoczi, 2025/06/17