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Re: [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hot


From: Jonathan Cameron
Subject: Re: [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events
Date: Fri, 20 Jun 2025 10:44:45 +0100

On Mon, 16 Jun 2025 11:46:49 +0200
Eric Auger <eric.auger@redhat.com> wrote:

> QEMU will notify the OS about PCI hotplug/hotunplug events through
> GED interrupts. Let the GED device handle a new PCI hotplug event.
> On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK
> mutex held.
> 
> The GED device uses a dedicated MMIO region that will be mapped
> by the machine code.
> 
> At this point the GED still does not support PCI device hotplug in
> its TYPE_HOTPLUG_HANDLER implementation. This will come in a
> subsequent patch.
> 
> Signed-off-by: Eric Auger <eric.auger@redhat.com>

Been a little while since I looked at how all this fits together
but this looks right from what I can remember.  Hopefully others
can give a more definitive review!

One stray change that belongs in an earlier patch though.
With that fixed up.

So with that in mind.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>



> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index e79a24b821..36492aa0d9 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -43,7 +43,6 @@
>  #include "qobject/qnum.h"
>  #include "trace.h"
>  
> -#define ACPI_PCIHP_SIZE 0x0018

It goes away from here, but doesn't get added anywhere?

Looks like this belongs in patch 17?

>  #define PCI_UP_BASE 0x0000
>  #define PCI_DOWN_BASE 0x0004
>  #define PCI_EJ_BASE 0x0008




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