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[Qemu-ppc] [PATCH 13/13] target-ppc: Give a meaningful error if too many
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified |
Date: |
Tue, 4 Dec 2012 13:42:17 +1100 |
From: Mike Qiu <address@hidden>
Currently the target-ppc tcg code only supports a single thread. You can
specify more, but they're treated identically to multiple cores. On KVM
we obviously can't support more threads than the hardware; if more are
specified it will cause strange and cryptic errors.
This patch clarifies the situation by giving a simple meaningful error if
more threads are specified than we can support.
Signed-off-by: Mike Qiu <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate_init.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index dba572f..784361c 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -28,6 +28,7 @@
#include <kvm.h>
#include "kvm_ppc.h"
#include "arch_init.h"
+#include "cpus.h"
//#define PPC_DUMP_CPU
//#define PPC_DEBUG_SPR
@@ -10037,6 +10038,8 @@ static int ppc_fixup_cpu(CPUPPCState *env)
int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
{
+ int max_smt = kvmppc_smt_threads();
+
env->msr_mask = def->msr_mask;
env->mmu_model = def->mmu_model;
env->excp_model = def->excp_model;
@@ -10046,6 +10049,11 @@ int cpu_ppc_register_internal (CPUPPCState *env, const
ppc_def_t *def)
env->flags = def->flags;
env->bfd_mach = def->bfd_mach;
env->check_pow = def->check_pow;
+ if (smp_threads > max_smt){
+ fprintf(stderr, "Cannot support more than %d threads on PPC with %s\n",
+ max_smt, kvm_enabled() ? "KVM" : "TCG");
+ exit(1);
+ }
#if defined(TARGET_PPC64)
if (def->sps)
--
1.7.10.4
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 08/13] pseries: Update SLOF for NVRAM support, (continued)
[Qemu-ppc] [PATCH 12/13] pseries: Increase default NVRAM size, David Gibson, 2012/12/03
[Qemu-ppc] [PATCH 06/13] pseries: Split xics irq configuration from state information, David Gibson, 2012/12/03
[Qemu-ppc] [PATCH 04/13] pseries: Allow RTAS tokens without a qemu handler, David Gibson, 2012/12/03
[Qemu-ppc] [PATCH 02/13] pseries: Use #define for XICS base irq number, David Gibson, 2012/12/03
[Qemu-ppc] [PATCH 10/13] target-ppc: Don't use hwaddr to represent hardware state, David Gibson, 2012/12/03
[Qemu-ppc] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified,
David Gibson <=
- Re: [Qemu-ppc] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified, David Gibson, 2012/12/03
- Re: [Qemu-ppc] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified, Alexander Graf, 2012/12/13
- Re: [Qemu-ppc] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified, David Gibson, 2012/12/13
- Re: [Qemu-ppc] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified, Alexander Graf, 2012/12/13
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified, Peter Maydell, 2012/12/13
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified, Peter Maydell, 2012/12/13
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified, David Gibson, 2012/12/16
[Qemu-ppc] [PATCH 03/13] pseries: Return the token when we register an RTAS call, David Gibson, 2012/12/03
[Qemu-ppc] [PATCH 05/13] pseries: Add tracepoints to the XICS interrupt controller, David Gibson, 2012/12/03
[Qemu-ppc] [PATCH 07/13] pseries: Implement PAPR NVRAM, David Gibson, 2012/12/03