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[Qemu-ppc] [PATCH 07/32] target-ppc: Rework get_physical_address()
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 07/32] target-ppc: Rework get_physical_address() |
Date: |
Fri, 15 Feb 2013 19:00:57 +1100 |
Currently get_physical_address() first checks to see if translation is
enabled in the MSR, then in the translation on case switches on the mmu
type. Except that for BookE MMUs, translation is always on, and so it
has to switch in the "translation off" case as well and do the same thing
as the translation on path for those MMUs. Plus, even translation off
doesn't behave exactly the same on the various MMU types so there are
further mmu type checks in the "translation off" path.
As a first step to cleaning this up, this patch moves the switch on mmu
type to the top level, then makes the translation on/off check just for
those mmu types where it is meaningful.
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mmu_helper.c | 92 ++++++++++++++++++++++++-----------------------
1 file changed, 47 insertions(+), 45 deletions(-)
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index cf67b57..6950a3f 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -1410,32 +1410,22 @@ static inline int check_physical(CPUPPCState *env,
mmu_ctx_t *ctx,
static int get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
target_ulong eaddr, int rw, int access_type)
{
- int ret;
+ int ret = -1;
+ bool real_mode = (access_type == ACCESS_CODE && msr_ir == 0)
+ || (access_type != ACCESS_CODE && msr_dr == 0);
#if 0
qemu_log("%s\n", __func__);
#endif
- if ((access_type == ACCESS_CODE && msr_ir == 0) ||
- (access_type != ACCESS_CODE && msr_dr == 0)) {
- if (env->mmu_model == POWERPC_MMU_BOOKE) {
- /* The BookE MMU always performs address translation. The
- IS and DS bits only affect the address space. */
- ret = mmubooke_get_physical_address(env, ctx, eaddr,
- rw, access_type);
- } else if (env->mmu_model == POWERPC_MMU_BOOKE206) {
- ret = mmubooke206_get_physical_address(env, ctx, eaddr, rw,
- access_type);
- } else {
- /* No address translation. */
+
+ switch (env->mmu_model) {
+ case POWERPC_MMU_32B:
+ case POWERPC_MMU_601:
+ case POWERPC_MMU_SOFT_6xx:
+ case POWERPC_MMU_SOFT_74xx:
+ if (real_mode) {
ret = check_physical(env, ctx, eaddr, rw);
- }
- } else {
- ret = -1;
- switch (env->mmu_model) {
- case POWERPC_MMU_32B:
- case POWERPC_MMU_601:
- case POWERPC_MMU_SOFT_6xx:
- case POWERPC_MMU_SOFT_74xx:
+ } else {
/* Try to find a BAT */
if (env->nb_BATs != 0) {
ret = get_bat(env, ctx, eaddr, rw, access_type);
@@ -1444,40 +1434,52 @@ static int get_physical_address(CPUPPCState *env,
mmu_ctx_t *ctx,
/* We didn't match any BAT entry or don't have BATs */
ret = get_segment32(env, ctx, eaddr, rw, access_type);
}
- break;
+ }
+ break;
#if defined(TARGET_PPC64)
- case POWERPC_MMU_64B:
- case POWERPC_MMU_2_06:
- case POWERPC_MMU_2_06d:
+ case POWERPC_MMU_64B:
+ case POWERPC_MMU_2_06:
+ case POWERPC_MMU_2_06d:
+ if (real_mode) {
+ ret = check_physical(env, ctx, eaddr, rw);
+ } else {
ret = get_segment64(env, ctx, eaddr, rw, access_type);
- break;
+ }
+ break;
#endif
- case POWERPC_MMU_SOFT_4xx:
- case POWERPC_MMU_SOFT_4xx_Z:
+ case POWERPC_MMU_SOFT_4xx:
+ case POWERPC_MMU_SOFT_4xx_Z:
+ if (real_mode) {
+ ret = check_physical(env, ctx, eaddr, rw);
+ } else {
ret = mmu40x_get_physical_address(env, ctx, eaddr,
rw, access_type);
- break;
- case POWERPC_MMU_BOOKE:
- ret = mmubooke_get_physical_address(env, ctx, eaddr,
- rw, access_type);
- break;
- case POWERPC_MMU_BOOKE206:
- ret = mmubooke206_get_physical_address(env, ctx, eaddr, rw,
+ }
+ break;
+ case POWERPC_MMU_BOOKE:
+ ret = mmubooke_get_physical_address(env, ctx, eaddr,
+ rw, access_type);
+ break;
+ case POWERPC_MMU_BOOKE206:
+ ret = mmubooke206_get_physical_address(env, ctx, eaddr, rw,
access_type);
- break;
- case POWERPC_MMU_MPC8xx:
- /* XXX: TODO */
- cpu_abort(env, "MPC8xx MMU model is not implemented\n");
- break;
- case POWERPC_MMU_REAL:
+ break;
+ case POWERPC_MMU_MPC8xx:
+ /* XXX: TODO */
+ cpu_abort(env, "MPC8xx MMU model is not implemented\n");
+ break;
+ case POWERPC_MMU_REAL:
+ if (real_mode) {
+ ret = check_physical(env, ctx, eaddr, rw);
+ } else {
cpu_abort(env, "PowerPC in real mode do not do any translation\n");
- return -1;
- default:
- cpu_abort(env, "Unknown or invalid MMU model\n");
- return -1;
}
+ return -1;
+ default:
+ cpu_abort(env, "Unknown or invalid MMU model\n");
+ return -1;
}
#if 0
qemu_log("%s address " TARGET_FMT_lx " => %d " TARGET_FMT_plx "\n",
--
1.7.10.4
- [Qemu-ppc] [PATCH 04/32] target-ppc: Disentangle 64-bit version of pte_check(), (continued)
- [Qemu-ppc] [PATCH 04/32] target-ppc: Disentangle 64-bit version of pte_check(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 02/32] target-ppc: Remove address check for logging, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 08/32] target-ppc: Disentangle 64-bit hash MMU get_physical_address() paths, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 14/32] mmu-hash64: Add header file for definitions, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 12/32] target-ppc: Don't share get_pteg_offset() between 32 and 64-bit, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 16/32] mmu-hash64: Stop using access_type, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 10/32] target-ppc: Disentangle 64-bit hash version of cpu_get_phys_page_debug(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 19/32] mmu-hash64: Combine ppc_hash64_get_physical_address and get_segment64(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 20/32] mmu-hash64: Cleanup segment-level access checks, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 09/32] target-ppc: Disentangle ppc64 hash mmu path for cpu_ppc_handle_mmu_fault, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 07/32] target-ppc: Rework get_physical_address(),
David Gibson <=
- [Qemu-ppc] [PATCH 05/32] target-ppc: Disentangle 64-bit version of find_pte(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 13/32] target-ppc: mmu_ctx_t should not be a global type, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 06/32] target-ppc: Disentangle 64-bit version of get_segment(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 15/32] mmu-hash64: Add hash pte load/store helpers, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 21/32] mmu-hash64: Don't keep looking for PTEs after we find a match, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 24/32] mmu-hash64: Make find_pte64 do more of the job of finding a pte, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 27/32] mmu-hash64: Don't update PTE flags when permission is denied, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 03/32] target-ppc: Move SLB handling into a mmu-hash64.c, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 26/32] mmu-hash64: Clean up ppc_hash64_htab_lookup(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 23/32] mmu-hash64: Separate PTEG searching from permissions checking, David Gibson, 2013/02/15