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[Qemu-ppc] [PULL 011/130] mmu-hash64: fix Virtual Page Class Key Protect
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 011/130] mmu-hash64: fix Virtual Page Class Key Protection |
Date: |
Fri, 7 Mar 2014 00:32:18 +0100 |
From: Cédric Le Goater <address@hidden>
commit f80872e21c07edd06eb343eeeefc8af404b518a6 (mmu-hash64: Implement
Virtual Page Class Key Protection) added a new page protection
mechanism based on page keys and the AMR register to control access.
The AMR register allows or prohibits reads and/or writes on a page
depending on the control bits associated to the key. A store or a load
is only permitted if the associate bit is 0 (Power ISA), and not 1 as
the code is currently doing. This patch modifies ppc_hash64_amr_prot()
to correct the protection check.
This issue was unvailed by commit ccfb53ed6360cac0d5f6f7915ca9ae7eed866412
(target-ppc: fix Authority Mask Register init value) which changed the
initialisation value of the AMR register to 0.
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/mmu-hash64.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 67fc1b5..c1c33b0 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -278,12 +278,12 @@ static int ppc_hash64_pte_prot(CPUPPCState *env,
static int ppc_hash64_amr_prot(CPUPPCState *env, ppc_hash_pte64_t pte)
{
int key, amrbits;
- int prot = PAGE_EXEC;
+ int prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
/* Only recent MMUs implement Virtual Page Class Key Protection */
if (!(env->mmu_model & POWERPC_MMU_AMR)) {
- return PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+ return prot;
}
key = HPTE64_R_KEY(pte.pte1);
@@ -292,11 +292,19 @@ static int ppc_hash64_amr_prot(CPUPPCState *env,
ppc_hash_pte64_t pte)
/* fprintf(stderr, "AMR protection: key=%d AMR=0x%" PRIx64 "\n", key, */
/* env->spr[SPR_AMR]); */
+ /*
+ * A store is permitted if the AMR bit is 0. Remove write
+ * protection if it is set.
+ */
if (amrbits & 0x2) {
- prot |= PAGE_WRITE;
+ prot &= ~PAGE_WRITE;
}
+ /*
+ * A load is permitted if the AMR bit is 0. Remove read
+ * protection if it is set.
+ */
if (amrbits & 0x1) {
- prot |= PAGE_READ;
+ prot &= ~PAGE_READ;
}
return prot;
--
1.8.1.4
- [Qemu-ppc] [PULL 003/130] target-ppc: remove powerpc 970gx, (continued)
- [Qemu-ppc] [PULL 003/130] target-ppc: remove powerpc 970gx, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 005/130] target-ppc: remove embedded MMU SPRs from 970, P5+/7/7+/8, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 006/130] target-ppc: remove unsupported SPRs from 970 and P5+, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 007/130] KVM: Split QEMUMachine typedef into separate header, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 016/130] target-ppc: disable unsupported modes for SPR_CTRL/SPR_UCTRL, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 014/130] spapr-pci: enable adding PHB via -device, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 012/130] PPC: KVM: fix "set one register", Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 027/130] target-ppc: Add VSX ISA2.06 Multiply Add Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 019/130] target-ppc: Add VSX ISA2.06 xadd/xsub Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 011/130] mmu-hash64: fix Virtual Page Class Key Protection,
Alexander Graf <=
- [Qemu-ppc] [PULL 021/130] target-ppc: Add VSX ISA2.06 xdiv Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 004/130] target-ppc: fix SPR_CTRL/SPR_UCTRL register numbers, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 031/130] target-ppc: Add VSX Floating Point to Floating Point Conversion Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 032/130] target-ppc: Add VSX ISA2.06 Integer Conversion Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 048/130] target-ppc: Move To/From VSR Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 055/130] target-ppc: Add ISA2.06 divde[o] Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 053/130] target-ppc: Add Flag for ISA2.06 Divide Extended Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 052/130] target-ppc: Add ISA2.06 bpermd Instruction, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 068/130] target-ppc: Enable frsqrtes on Power7 and Power8, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 069/130] target-ppc: Add ISA2.06 lfiwzx Instruction, Alexander Graf, 2014/03/06