[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [PATCH v1 01/10] target-ppc: add xxspltib instruction
From: |
Nikunj A Dadhania |
Subject: |
Re: [Qemu-ppc] [PATCH v1 01/10] target-ppc: add xxspltib instruction |
Date: |
Fri, 12 Aug 2016 10:25:09 +0530 |
User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
Richard Henderson <address@hidden> writes:
> On 08/10/2016 08:00 PM, Nikunj A Dadhania wrote:
>> +#if defined(TARGET_PPC64)
>> +#define pattern(x) (((x) & 0xff) * (~(target_ulong)0 / 0xff))
>> +
>> +static void gen_xxspltib(DisasContext *ctx)
> ...
>> + tcg_gen_movi_i64(cpu_vsrh(xT(ctx->opcode)), pattern(uim8));
>
> Is this function really not available in 32-bit mode?
I need to on this.
> I'd been pointing out that you should change target_ulong in PATTERN, above,
> to
> uint64_t, so that you match tcg_gen_movi_i64.
Ah.. in fact, I had changed it this way first, then thought that this
may not be available in 32-bit and then put it under TARGET_PPC64
Regards
Nikunj
[Qemu-ppc] [PATCH v1 03/10] target-ppc: consolidate store operations, Nikunj A Dadhania, 2016/08/10
[Qemu-ppc] [PATCH v1 06/10] target-ppc: add stxsi[bh]x instruction, Nikunj A Dadhania, 2016/08/10
[Qemu-ppc] [PATCH v1 05/10] target-ppc: add lxsi[bw]zx instruction, Nikunj A Dadhania, 2016/08/10
[Qemu-ppc] [PATCH v1 04/10] target-ppc: Implement darn instruction, Nikunj A Dadhania, 2016/08/10
[Qemu-ppc] [PATCH v1 07/10] target-ppc: improve lxvw4x implementation, Nikunj A Dadhania, 2016/08/10