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Re: [Qemu-ppc] [QEMU-PPC] [PATCH V4 02/11] target/ppc: Fix LPCR DPFD mas
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [QEMU-PPC] [PATCH V4 02/11] target/ppc: Fix LPCR DPFD mask define |
Date: |
Fri, 24 Feb 2017 14:53:18 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Fri, Feb 24, 2017 at 12:05:08PM +1100, Suraj Jitindar Singh wrote:
> The DPFD field in the LPCR is 3 bits wide. This has always been defined
> as 0x3 << shift which indicates a 2 bit field, which is incorrect.
> Correct this.
>
> Signed-off-by: Suraj Jitindar Singh <address@hidden>
> Acked-by: Balbir Singh <address@hidden>
I already merged this - I'm not quite sure how it survived your rebase..
> ---
> target/ppc/cpu.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 1dcbaae..ea08625 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -377,7 +377,7 @@ struct ppc_slb_t {
> #define LPCR_ISL (1ull << (63 - 2))
> #define LPCR_KBV (1ull << (63 - 3))
> #define LPCR_DPFD_SHIFT (63 - 11)
> -#define LPCR_DPFD (0x3ull << LPCR_DPFD_SHIFT)
> +#define LPCR_DPFD (0x7ull << LPCR_DPFD_SHIFT)
> #define LPCR_VRMASD_SHIFT (63 - 16)
> #define LPCR_VRMASD (0x1full << LPCR_VRMASD_SHIFT)
> #define LPCR_RMLS_SHIFT (63 - 37)
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [QEMU-PPC] [PATCH V4 00/11] target/ppc: Implement POWER9 pseries tcg legacy support, Suraj Jitindar Singh, 2017/02/23
- [Qemu-ppc] [QEMU-PPC] [PATCH V4 01/11] target/ppc/POWER9: Add ISAv3.00 MMU definition, Suraj Jitindar Singh, 2017/02/23
- [Qemu-ppc] [QEMU-PPC] [PATCH V4 02/11] target/ppc: Fix LPCR DPFD mask define, Suraj Jitindar Singh, 2017/02/23
- Re: [Qemu-ppc] [QEMU-PPC] [PATCH V4 02/11] target/ppc: Fix LPCR DPFD mask define,
David Gibson <=
- [Qemu-ppc] [QEMU-PPC] [PATCH V4 03/11] target/ppc/POWER9: Adapt LPCR handling for POWER9, Suraj Jitindar Singh, 2017/02/23
- [Qemu-ppc] [QEMU-PPC] [PATCH V4 04/11] target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv, Suraj Jitindar Singh, 2017/02/23
- [Qemu-ppc] [QEMU-PPC] [PATCH V4 05/11] target/ppc: Add patb_entry to sPAPRMachineState, Suraj Jitindar Singh, 2017/02/23
- [Qemu-ppc] [QEMU-PPC] [PATCH V4 06/11] target/ppc: Remove the function ppc_hash64_set_sdr1(), Suraj Jitindar Singh, 2017/02/23
- [Qemu-ppc] [QEMU-PPC] [PATCH V4 08/11] target/ppc/POWER9: Add POWER9 mmu fault handler, Suraj Jitindar Singh, 2017/02/23