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[Qemu-ppc] [PULL 46/48] e500, book3s: mfspr 259: Register mapped/aliased
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 46/48] e500, book3s: mfspr 259: Register mapped/aliased SPRG3 user read |
Date: |
Wed, 26 Apr 2017 17:00:32 +1000 |
From: Bernhard Kaindl <address@hidden>
This patch registers mfspr 259 for Book3S and e500 family cores
following this research:
mfspr 259 provides read-only mapped user access to SPRG3(SPR 275) according to:
- PowerISA 2.02, Book III (documents implementation starting with POWER4+ @ p20)
- IBM PowerPC 970MP RISC Microprocessor User's Manual v2.1, page 48
- Amit Singh: "Mac OS X Internals: A Systems Approach" on 970 and 970FX cores:
He demonstrates mfspr 259 reading TLS data from Mac OS X on G5 on page 588
- NXP documents it in the Core Reference Manuals of: e500, e500mc and e5500
- getcpu() of the 32 & 64-bit Book3S Linux vDSOs use it to read the core number
mfspr 259 does not appear to be implemented in these cores according to:
- 74xx series: MPC7410/MPC7400 and MPC7450 RISC Microprocessor Reference Manuals
- 4xx series: PPC440 Processor User's Manual, Revision 1.09 by AMCC
- 750 series: IBM PowerPC 750CL RISC Microprocessor User's Manual
- e200 series: e200z4 Power ArchitectureĆ¢ Core Reference Manual
Implementation: gen_spr_usprg3() is called from init_proc_book3s_common()
(covers the 970 and POWER cores) and init_proc_e500() (covers the e500 family)
to register spr_read_ureg() in the same way which it already provides
the mapped SPR access for SPR_USPRG4-7 in gen_spr_usprgh() for cores
which have the same read-only mapped SPRG register access for SPRG4-7.
Verified using Linux by pinning a thread to a core and checking sched_getcpu()
using qemu-system-ppc64 -M pseries -cpu POWER8 using MTTCG on a x86_64 host.
Signed-off-by: Bernhard Kaindl <address@hidden>
Reviewed-by: Stefan Resch <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/translate_init.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index 77e5463..0ecf541 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -1640,6 +1640,14 @@ static void spr_write_booke_pid (DisasContext *ctx, int
sprn, int gprn)
}
#endif
+static void gen_spr_usprg3 (CPUPPCState *env)
+{
+ spr_register(env, SPR_USPRG3, "USPRG3",
+ &spr_read_ureg, SPR_NOACCESS,
+ &spr_read_ureg, SPR_NOACCESS,
+ 0x00000000);
+}
+
static void gen_spr_usprgh (CPUPPCState *env)
{
spr_register(env, SPR_USPRG4, "USPRG4",
@@ -4914,6 +4922,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
break;
}
gen_spr_BookE(env, ivor_mask);
+ gen_spr_usprg3(env);
/* Processor identification */
spr_register(env, SPR_BOOKE_PIR, "PIR",
SPR_NOACCESS, SPR_NOACCESS,
@@ -8245,6 +8254,7 @@ static void init_proc_book3s_common(CPUPPCState *env)
{
gen_spr_ne_601(env);
gen_tbl(env);
+ gen_spr_usprg3(env);
gen_spr_book3s_altivec(env);
gen_spr_book3s_pmu_sup(env);
gen_spr_book3s_pmu_user(env);
--
2.9.3
- [Qemu-ppc] [PULL 05/48] target-ppc: kvm: make use of KVM_CREATE_SPAPR_TCE_64, (continued)
- [Qemu-ppc] [PULL 05/48] target-ppc: kvm: make use of KVM_CREATE_SPAPR_TCE_64, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 35/48] spapr: remove the 'nr_servers' field from the machine, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 36/48] ppc/pnv: Add support for POWER8+ LPC Controller, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 30/48] ipmi: use a file to load SDRs, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 34/48] target/ppc: Fix size of struct PPCElfPrstatus, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 43/48] ppc/pnv: generate an OEM SEL event on shutdown, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 26/48] ppc/pnv: add memory regions for the ICP registers, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 27/48] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 42/48] ppc/pnv: add initial IPMI sensors for the BMC simulator, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 33/48] ipmi: introduce an ipmi_bmc_gen_event() API, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 46/48] e500, book3s: mfspr 259: Register mapped/aliased SPRG3 user read,
David Gibson <=
- [Qemu-ppc] [PULL 47/48] target/ppc: Style fixes, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 18/48] spapr: move the IRQ server number mapping under the machine, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 32/48] ipmi: introduce an ipmi_bmc_sdr_find() API, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 44/48] spapr-cpu-core: Release ICPState object during CPU unrealization, David Gibson, 2017/04/26
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/48] ppc-for-2.10 queue 20170426, no-reply, 2017/04/26
- Re: [Qemu-ppc] [PULL 00/48] ppc-for-2.10 queue 20170426, Peter Maydell, 2017/04/26