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Re: [Qemu-ppc] [RFC PATCH 04/12] ehci: Add ppc4xx-ehci for the USB 2.0 c
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [RFC PATCH 04/12] ehci: Add ppc4xx-ehci for the USB 2.0 controller in embedded PPC SoCs |
Date: |
Mon, 14 Aug 2017 14:36:53 +1000 |
User-agent: |
Mutt/1.8.3 (2017-05-23) |
On Sun, Aug 13, 2017 at 07:04:38PM +0200, BALATON Zoltan wrote:
This needs a commit message. AFAICT the new device is basically a
sysbus EHCI with some altered initial values. Why do those values
need to be different? Where do the new values come from?
> Signed-off-by: BALATON Zoltan <address@hidden>
> ---
> hw/usb/hcd-ehci-sysbus.c | 25 +++++++++++++++++++++++++
> hw/usb/hcd-ehci.h | 1 +
> 2 files changed, 26 insertions(+)
>
> diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
> index 6c20604..3b83beb 100644
> --- a/hw/usb/hcd-ehci-sysbus.c
> +++ b/hw/usb/hcd-ehci-sysbus.c
> @@ -142,6 +142,30 @@ static const TypeInfo ehci_tegra2_type_info = {
> .class_init = ehci_tegra2_class_init,
> };
>
> +static void ehci_ppc4xx_init(Object *o)
> +{
> + EHCISysBusState *s = SYS_BUS_EHCI(o);
> +
> + s->ehci.companion_enable = true;
> +}
> +
> +static void ehci_ppc4xx_class_init(ObjectClass *oc, void *data)
> +{
> + SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
> + DeviceClass *dc = DEVICE_CLASS(oc);
> +
> + sec->capsbase = 0x0;
> + sec->opregbase = 0x10;
> + set_bit(DEVICE_CATEGORY_USB, dc->categories);
> +}
> +
> +static const TypeInfo ehci_ppc4xx_type_info = {
> + .name = TYPE_PPC4xx_EHCI,
> + .parent = TYPE_SYS_BUS_EHCI,
> + .class_init = ehci_ppc4xx_class_init,
> + .instance_init = ehci_ppc4xx_init,
> +};
> +
> /*
> * Faraday FUSBH200 USB 2.0 EHCI
> */
> @@ -224,6 +248,7 @@ static void ehci_sysbus_register_types(void)
> type_register_static(&ehci_xlnx_type_info);
> type_register_static(&ehci_exynos4210_type_info);
> type_register_static(&ehci_tegra2_type_info);
> + type_register_static(&ehci_ppc4xx_type_info);
> type_register_static(&ehci_fusbh200_type_info);
> }
>
> diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
> index 821f1de..0bc364b 100644
> --- a/hw/usb/hcd-ehci.h
> +++ b/hw/usb/hcd-ehci.h
> @@ -344,6 +344,7 @@ typedef struct EHCIPCIState {
> #define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb"
> #define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb"
> #define TYPE_TEGRA2_EHCI "tegra2-ehci-usb"
> +#define TYPE_PPC4xx_EHCI "ppc4xx-ehci-usb"
> #define TYPE_FUSBH200_EHCI "fusbh200-ehci-usb"
>
> #define SYS_BUS_EHCI(obj) \
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-ppc] [RFC PATCH 11/12] ppc4xx: Export ECB and PLB emulation, (continued)
[Qemu-ppc] [RFC PATCH 03/12] ohci: Allow sysbus version to be used as a companion, BALATON Zoltan, 2017/08/13
[Qemu-ppc] [RFC PATCH 08/12] hw/ide: Emulate SiI3112 SATA controller, BALATON Zoltan, 2017/08/13
[Qemu-ppc] [RFC PATCH 04/12] ehci: Add ppc4xx-ehci for the USB 2.0 controller in embedded PPC SoCs, BALATON Zoltan, 2017/08/13
- Re: [Qemu-ppc] [RFC PATCH 04/12] ehci: Add ppc4xx-ehci for the USB 2.0 controller in embedded PPC SoCs,
David Gibson <=
[Qemu-ppc] [RFC PATCH 02/12] ppc4xx: Make MAL emulation more generic, BALATON Zoltan, 2017/08/13
[Qemu-ppc] [RFC PATCH 10/12] ppc: Add 460EX embedded CPU, BALATON Zoltan, 2017/08/13
[Qemu-ppc] [RFC PATCH 09/12] ppc440: Add emulation of plb-pcix controller found in some 440 SoCs, BALATON Zoltan, 2017/08/13
Re: [Qemu-ppc] [RFC PATCH 09/12] ppc440: Add emulation of plb-pcix controller found in some 440 SoCs, luigi burdo, 2017/08/18