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[PULL 53/88] spapr: Improve handling of fdt buffer size
From: |
David Gibson |
Subject: |
[PULL 53/88] spapr: Improve handling of fdt buffer size |
Date: |
Tue, 17 Dec 2019 15:42:47 +1100 |
Previously, spapr_build_fdt() constructed the device tree in a fixed
buffer of size FDT_MAX_SIZE. This is a bit inflexible, but more
importantly it's awkward for the case where we use it during CAS. In
that case the guest firmware supplies a buffer and we have to
awkwardly check that what we generated fits into it afterwards, after
doing a lot of size checks during spapr_build_fdt().
Simplify this by having spapr_build_fdt() take a 'space' parameter.
For the CAS case, we pass in the buffer size provided by SLOF, for the
machine init case, we continue to pass FDT_MAX_SIZE.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Cedric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
---
hw/ppc/spapr.c | 33 +++++++++++----------------------
1 file changed, 11 insertions(+), 22 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index e3c7d487b8..df5bea1bd4 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -917,7 +917,8 @@ static bool spapr_hotplugged_dev_before_cas(void)
return false;
}
-static void *spapr_build_fdt(SpaprMachineState *spapr, bool reset);
+static void *spapr_build_fdt(SpaprMachineState *spapr, bool reset,
+ size_t space);
int spapr_h_cas_compose_response(SpaprMachineState *spapr,
target_ulong addr, target_ulong size,
@@ -930,24 +931,17 @@ int spapr_h_cas_compose_response(SpaprMachineState *spapr,
return 1;
}
- if (size < sizeof(hdr) || size > FW_MAX_SIZE) {
- error_report("SLOF provided an unexpected CAS buffer size "
- TARGET_FMT_lu " (min: %zu, max: %u)",
- size, sizeof(hdr), FW_MAX_SIZE);
+ if (size < sizeof(hdr)) {
+ error_report("SLOF provided insufficient CAS buffer "
+ TARGET_FMT_lu " (min: %zu)", size, sizeof(hdr));
exit(EXIT_FAILURE);
}
size -= sizeof(hdr);
- fdt = spapr_build_fdt(spapr, false);
+ fdt = spapr_build_fdt(spapr, false, size);
_FDT((fdt_pack(fdt)));
- if (fdt_totalsize(fdt) + sizeof(hdr) > size) {
- g_free(fdt);
- trace_spapr_cas_failed(size);
- return -1;
- }
-
cpu_physical_memory_write(addr, &hdr, sizeof(hdr));
cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));
trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));
@@ -1197,7 +1191,8 @@ static void spapr_dt_hypervisor(SpaprMachineState *spapr,
void *fdt)
}
}
-static void *spapr_build_fdt(SpaprMachineState *spapr, bool reset)
+static void *spapr_build_fdt(SpaprMachineState *spapr, bool reset,
+ size_t space)
{
MachineState *machine = MACHINE(spapr);
MachineClass *mc = MACHINE_GET_CLASS(machine);
@@ -1207,8 +1202,8 @@ static void *spapr_build_fdt(SpaprMachineState *spapr,
bool reset)
SpaprPhbState *phb;
char *buf;
- fdt = g_malloc0(FDT_MAX_SIZE);
- _FDT((fdt_create_empty_tree(fdt, FDT_MAX_SIZE)));
+ fdt = g_malloc0(space);
+ _FDT((fdt_create_empty_tree(fdt, space)));
/* Root node */
_FDT(fdt_setprop_string(fdt, 0, "device_type", "chrp"));
@@ -1723,19 +1718,13 @@ static void spapr_machine_reset(MachineState *machine)
*/
fdt_addr = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FDT_MAX_SIZE;
- fdt = spapr_build_fdt(spapr, true);
+ fdt = spapr_build_fdt(spapr, true, FDT_MAX_SIZE);
rc = fdt_pack(fdt);
/* Should only fail if we've built a corrupted tree */
assert(rc == 0);
- if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
- error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
- fdt_totalsize(fdt), FDT_MAX_SIZE);
- exit(1);
- }
-
/* Load the fdt */
qemu_fdt_dumpdtb(fdt, fdt_totalsize(fdt));
cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
--
2.23.0
- [PULL 58/88] ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models, (continued)
- [PULL 58/88] ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models, David Gibson, 2019/12/16
- [PULL 52/88] spapr: Don't trigger a CAS reboot for XICS/XIVE mode changeover, David Gibson, 2019/12/16
- [PULL 57/88] xics: Don't deassert outputs, David Gibson, 2019/12/16
- [PULL 43/88] ppc/pnv: Clarify how the TIMA is accessed on a multichip system, David Gibson, 2019/12/16
- [PULL 51/88] ppc: well form kvmppc_hint_smt_possible error hint helper, David Gibson, 2019/12/16
- [PULL 54/88] spapr: Fold h_cas_compose_response() into h_client_architecture_support(), David Gibson, 2019/12/16
- [PULL 55/88] spapr: Simplify ovec diff, David Gibson, 2019/12/16
- [PULL 49/88] ppc/pnv: Extend XiveRouter with a get_block_id() handler, David Gibson, 2019/12/16
- [PULL 53/88] spapr: Improve handling of fdt buffer size,
David Gibson <=
- [PULL 56/88] ppc: Deassert the external interrupt pin in KVM on reset, David Gibson, 2019/12/16
- [PULL 64/88] ppc/pnv: add a PSI bridge model for POWER10, David Gibson, 2019/12/16
- [PULL 69/88] target/ppc: Add SPR TBU40, David Gibson, 2019/12/16
- [PULL 50/88] ppc/pnv: Dump the XIVE NVT table, David Gibson, 2019/12/16
- [PULL 65/88] ppc/pnv: add a LPC Controller model for POWER10, David Gibson, 2019/12/16
- [PULL 60/88] ppc: Make PPCVirtualHypervisor an incomplete type, David Gibson, 2019/12/16
- [PULL 59/88] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM, David Gibson, 2019/12/16
- [PULL 70/88] ppc/pnv: Loop on the whole hierarchy to populate the DT with the XSCOM nodes, David Gibson, 2019/12/16
- [PULL 63/88] ppc/psi: cleanup definitions, David Gibson, 2019/12/16
- [PULL 68/88] target/ppc: Add SPR ASDR, David Gibson, 2019/12/16