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[PULL 11/45] target/ppc: Remove RMOR register from POWER9 & POWER10
From: |
David Gibson |
Subject: |
[PULL 11/45] target/ppc: Remove RMOR register from POWER9 & POWER10 |
Date: |
Tue, 17 Mar 2020 21:03:49 +1100 |
Currently we create the Real Mode Offset Register (RMOR) on all Book3S cpus
from POWER7 onwards. However the translation mode which the RMOR controls
is no longer supported in POWER9, and so the register has been removed from
the architecture.
Remove it from our model on POWER9 and POWER10.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
---
target/ppc/translate_init.inc.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index aecad96db3..f7acd3d61d 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -8015,12 +8015,16 @@ static void gen_spr_book3s_ids(CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
- spr_register_hv(env, SPR_RMOR, "RMOR",
+ spr_register_hv(env, SPR_HRMOR, "HRMOR",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
- spr_register_hv(env, SPR_HRMOR, "HRMOR",
+}
+
+static void gen_spr_rmor(CPUPPCState *env)
+{
+ spr_register_hv(env, SPR_RMOR, "RMOR",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
@@ -8497,6 +8501,7 @@ static void init_proc_POWER7(CPUPPCState *env)
/* POWER7 Specific Registers */
gen_spr_book3s_ids(env);
+ gen_spr_rmor(env);
gen_spr_amr(env);
gen_spr_book3s_purr(env);
gen_spr_power5p_common(env);
@@ -8637,6 +8642,7 @@ static void init_proc_POWER8(CPUPPCState *env)
/* POWER8 Specific Registers */
gen_spr_book3s_ids(env);
+ gen_spr_rmor(env);
gen_spr_amr(env);
gen_spr_iamr(env);
gen_spr_book3s_purr(env);
--
2.24.1
- [PULL 02/45] spapr: Handle pending hot plug/unplug requests at CAS, (continued)
- [PULL 02/45] spapr: Handle pending hot plug/unplug requests at CAS, David Gibson, 2020/03/17
- [PULL 03/45] ppc: Officially deprecate the CPU "compat" property, David Gibson, 2020/03/17
- [PULL 05/45] hw/ppc/pnv: Fix typo in comment, David Gibson, 2020/03/17
- [PULL 10/45] spapr, ppc: Remove VPM0/RMLS hacks for POWER9, David Gibson, 2020/03/17
- [PULL 06/45] ppc: Remove stub support for 32-bit hypervisor mode, David Gibson, 2020/03/17
- [PULL 08/45] target/ppc: Correct handling of real mode accesses with vhyp on hash MMU, David Gibson, 2020/03/17
- [PULL 07/45] ppc: Remove stub of PPC970 HID4 implementation, David Gibson, 2020/03/17
- [PULL 12/45] target/ppc: Use class fields to simplify LPCR masking, David Gibson, 2020/03/17
- [PULL 09/45] target/ppc: Introduce ppc_hash64_use_vrma() helper, David Gibson, 2020/03/17
- [PULL 13/45] target/ppc: Streamline calculation of RMA limit from LPCR[RMLS], David Gibson, 2020/03/17
- [PULL 11/45] target/ppc: Remove RMOR register from POWER9 & POWER10,
David Gibson <=
- [PULL 14/45] target/ppc: Correct RMLS table, David Gibson, 2020/03/17
- [PULL 23/45] hw/scsi/spapr_vscsi: Use SRP_MAX_IU_LEN instead of sizeof flexible array, David Gibson, 2020/03/17
- [PULL 15/45] target/ppc: Only calculate RMLS derived RMA limit on demand, David Gibson, 2020/03/17
- [PULL 18/45] spapr,ppc: Simplify signature of kvmppc_rma_size(), David Gibson, 2020/03/17
- [PULL 16/45] target/ppc: Don't store VRMA SLBE persistently, David Gibson, 2020/03/17
- [PULL 24/45] hw/scsi/spapr_vscsi: Simplify a bit, David Gibson, 2020/03/17
- [PULL 27/45] hw/scsi/spapr_vscsi: Prevent buffer overflow, David Gibson, 2020/03/17
- [PULL 20/45] spapr: Don't clamp RMA to 16GiB on new machine types, David Gibson, 2020/03/17
- [PULL 17/45] spapr: Don't use weird units for MIN_RMA_SLOF, David Gibson, 2020/03/17
- [PULL 19/45] spapr: Don't attempt to clamp RMA to VRMA constraint, David Gibson, 2020/03/17