[RFC] target/ppc: VSX instructions behavior change on ISA v3.1

[Victor Colombo]

Hello everyone,

Power ISA v3.1 changed the specified behavior of some VSX
instructions, making some fields that previously were undefined to
now be specified. I noticed at least 50 instructions that:

1. Store the result on doubleword 0, and used to leave doubleword 1
   undefined, but now specifies that doubleword 1 has to be zeroed
   out; or
2. Store the result on a word, leaving the other word undefined, but
    now specifies that the result should be replicated on the other word.

Some examples include xsmaxdp and xvcvdpuxws. It can be seem in the
ISA book that a Programming Note has been added to every instruction
affected stating the change.

Even though the result was undefined before, hardware implementing
older versions of the ISA already implemented the 'new' behavior.
For example, when running xvcvpuxws on a Power9 processor:

xvcvdpuxws(0x4094e5b530214b78) = 0x0000053900000539

So, this change just matches the ISA with previous implementations of
hardware.

Having said that, QEMU implementation as of now leaves the previously
undefined fields untouched, which is incorrect under the new ISA:

xvcvdpuxws(0x4094e5b530214b78) = 0x0000053930214b78

What would be the best approach on this issue? Some options include:

1. Leave as it is for now
2. Change the behavior for every processor, matching the hardware
3. Change the behavior but check for ISA310 flag, otherwise keeping
   previous behavior

Looking forward to see your opinions.

Thanks for your time. Best regards,

-- Víctor