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Re: [PATCH] target/ppc: Finish removal of 401/403 CPUs
From: |
David Gibson |
Subject: |
Re: [PATCH] target/ppc: Finish removal of 401/403 CPUs |
Date: |
Tue, 18 Jan 2022 11:44:25 +1100 |
On Mon, Jan 17, 2022 at 10:15:41AM +0100, Cédric le Goater wrote:
> Commit c8f49e6b938e ("target/ppc: remove 401/403 CPUs") left a few
> things behind.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
.. although I'm not sure "finish" is totally accurate since env->pb is
still there.
> ---
> target/ppc/helper.h | 1 -
> target/ppc/cpu-models.c | 1 -
> target/ppc/machine.c | 23 -----------------------
> target/ppc/misc_helper.c | 9 ---------
> target/ppc/translate.c | 16 +---------------
> 5 files changed, 1 insertion(+), 49 deletions(-)
>
> diff --git a/target/ppc/helper.h b/target/ppc/helper.h
> index f9c72dcd504d..d318837ea5cc 100644
> --- a/target/ppc/helper.h
> +++ b/target/ppc/helper.h
> @@ -703,7 +703,6 @@ DEF_HELPER_FLAGS_2(store_hdecr, TCG_CALL_NO_RWG, void,
> env, tl)
> DEF_HELPER_FLAGS_2(store_vtb, TCG_CALL_NO_RWG, void, env, tl)
> DEF_HELPER_FLAGS_2(store_tbu40, TCG_CALL_NO_RWG, void, env, tl)
> DEF_HELPER_2(store_hid0_601, void, env, tl)
> -DEF_HELPER_3(store_403_pbr, void, env, i32, tl)
> DEF_HELPER_FLAGS_1(load_40x_pit, TCG_CALL_NO_RWG, tl, env)
> DEF_HELPER_FLAGS_2(store_40x_pit, TCG_CALL_NO_RWG, void, env, tl)
> DEF_HELPER_FLAGS_2(store_40x_tcr, TCG_CALL_NO_RWG, void, env, tl)
> diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c
> index c9fcb6119f40..96fec9c2e501 100644
> --- a/target/ppc/cpu-models.c
> +++ b/target/ppc/cpu-models.c
> @@ -750,7 +750,6 @@
> /* PowerPC CPU aliases */
>
> PowerPCCPUAlias ppc_cpu_aliases[] = {
> - { "403", "403gc" },
> { "405", "405d4" },
> { "405cr", "405crc" },
> { "405gp", "405gpd" },
> diff --git a/target/ppc/machine.c b/target/ppc/machine.c
> index 756d8de5d8dd..ea0a0d4e4c7a 100644
> --- a/target/ppc/machine.c
> +++ b/target/ppc/machine.c
> @@ -709,25 +709,6 @@ static bool tlbemb_needed(void *opaque)
> return env->nb_tlb && (env->tlb_type == TLB_EMB);
> }
>
> -static bool pbr403_needed(void *opaque)
> -{
> - PowerPCCPU *cpu = opaque;
> - uint32_t pvr = cpu->env.spr[SPR_PVR];
> -
> - return (pvr & 0xffff0000) == 0x00200000;
> -}
> -
> -static const VMStateDescription vmstate_pbr403 = {
> - .name = "cpu/pbr403",
> - .version_id = 1,
> - .minimum_version_id = 1,
> - .needed = pbr403_needed,
> - .fields = (VMStateField[]) {
> - VMSTATE_UINTTL_ARRAY(env.pb, PowerPCCPU, 4),
> - VMSTATE_END_OF_LIST()
> - },
> -};
> -
> static const VMStateDescription vmstate_tlbemb = {
> .name = "cpu/tlb6xx",
> .version_id = 1,
> @@ -742,10 +723,6 @@ static const VMStateDescription vmstate_tlbemb = {
> /* 403 protection registers */
> VMSTATE_END_OF_LIST()
> },
> - .subsections = (const VMStateDescription*[]) {
> - &vmstate_pbr403,
> - NULL
> - }
> };
>
> static const VMStateDescription vmstate_tlbmas_entry = {
> diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
> index c33f5f39b90b..1bcefa7c843c 100644
> --- a/target/ppc/misc_helper.c
> +++ b/target/ppc/misc_helper.c
> @@ -226,15 +226,6 @@ void helper_store_hid0_601(CPUPPCState *env,
> target_ulong val)
> }
> }
>
> -void helper_store_403_pbr(CPUPPCState *env, uint32_t num, target_ulong value)
> -{
> - if (likely(env->pb[num] != value)) {
> - env->pb[num] = value;
> - /* Should be optimized */
> - tlb_flush(env_cpu(env));
> - }
> -}
> -
> void helper_store_40x_dbcr0(CPUPPCState *env, target_ulong val)
> {
> /* Bits 26 & 27 affect single-stepping. */
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index abbc3a5bb9f0..059956bc59b3 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -911,22 +911,8 @@ void spr_write_booke_tsr(DisasContext *ctx, int sprn,
> int gprn)
> }
> #endif
>
> -/* PowerPC 403 specific registers */
> -/* PBL1 / PBU1 / PBL2 / PBU2 */
> +/* PIR */
> #if !defined(CONFIG_USER_ONLY)
> -void spr_read_403_pbr(DisasContext *ctx, int gprn, int sprn)
> -{
> - tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env,
> - offsetof(CPUPPCState, pb[sprn - SPR_403_PBL1]));
> -}
> -
> -void spr_write_403_pbr(DisasContext *ctx, int sprn, int gprn)
> -{
> - TCGv_i32 t0 = tcg_const_i32(sprn - SPR_403_PBL1);
> - gen_helper_store_403_pbr(cpu_env, t0, cpu_gpr[gprn]);
> - tcg_temp_free_i32(t0);
> -}
> -
> void spr_write_pir(DisasContext *ctx, int sprn, int gprn)
> {
> TCGv t0 = tcg_temp_new();
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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