[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v3 2/4] target/ppc: Remove chip type field from POWER9 DD2.0
From: |
David Gibson |
Subject: |
Re: [PATCH v3 2/4] target/ppc: Remove chip type field from POWER9 DD2.0 PVR |
Date: |
Sat, 12 Mar 2022 19:50:56 +1100 |
On Mon, Mar 07, 2022 at 04:55:25PM +1000, Nicholas Piggin wrote:
> The POWER9 DD2.0 PVR does not follow the same format as the other
> POWER9/10 PVRs, it includes a non-zero value in the "chip type" field.
I'm unclear whether you're describing the hardware PVR here, or the
value in qemu.
> This does not cause problems because the pvr check is masks it out and
> matches against the base, but it's a small inconsistency. Zero the
> field.
I assume this is making the qemu model match the hardware, but that's
not entirely clear to me from the commit message.
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> target/ppc/cpu-models.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h
> index 76775a74a9..b42f2ab162 100644
> --- a/target/ppc/cpu-models.h
> +++ b/target/ppc/cpu-models.h
> @@ -349,7 +349,7 @@ enum {
> CPU_POWERPC_POWER8NVL_v10 = 0x004C0100,
> CPU_POWERPC_POWER9_BASE = 0x004E0000,
> CPU_POWERPC_POWER9_DD1 = 0x004E0100,
> - CPU_POWERPC_POWER9_DD20 = 0x004E1200,
> + CPU_POWERPC_POWER9_DD20 = 0x004E0200,
> CPU_POWERPC_POWER10_BASE = 0x00800000,
> CPU_POWERPC_POWER10_DD1 = 0x00800100,
> CPU_POWERPC_POWER10_DD20 = 0x00800200,
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature