Re: [PATCH v2 1/2] tcg: ppc64: Fix mask generation for vextractdm

[Cédric Le Goater]

On 5/4/23 11:35, Shivaprasad G Bhat wrote:
> In function do_extractm() the mask is calculated as
> dup_const(1 << (element_width - 1)). '1' being signed int
> works fine for MO_8,16,32. For MO_64, on PPC64 host
> this ends up becoming 0 on compilation. The vextractdm
> uses MO_64, and it ends up having mask as 0.
>
> Explicitly use 1ULL instead of signed int 1 like its
> used everywhere else.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1536
> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   target/ppc/translate/vmx-impl.c.inc |    2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/ppc/translate/vmx-impl.c.inc 
> b/target/ppc/translate/vmx-impl.c.inc
> index 112233b541..c8712dd7d8 100644
> --- a/target/ppc/translate/vmx-impl.c.inc
> +++ b/target/ppc/translate/vmx-impl.c.inc
> @@ -2058,7 +2058,7 @@ static bool trans_VEXPANDQM(DisasContext *ctx, arg_VX_tb 
> *a)
>   static bool do_vextractm(DisasContext *ctx, arg_VX_tb *a, unsigned vece)
>   {
>       const uint64_t elem_width = 8 << vece, elem_count_half = 8 >> vece,
> -                   mask = dup_const(vece, 1 << (elem_width - 1));
> +                   mask = dup_const(vece, 1ULL << (elem_width - 1));
>       uint64_t i, j;
>       TCGv_i64 lo, hi, t0, t1;