Re: [PATCH v2 0/5] ppc/pnv: Extend "quad" model for p10

[Nicholas Piggin]

On Tue Jul 4, 2023 at 3:41 PM AEST, Joel Stanley wrote:
> The quad model implements the EC xscoms for the p9 machine, reusing the
> same model for p10 which isn't quite correct. This series adds a PnvQuad
> class and subclasses it for P9 and P10.
>
> I mistakenly thought we needed the quad model to implement the core
> thread state scom on p10, because the read was coming in to the address
> belonging to the quad. In fact the quad region was too large,
> overlapping with the core. This is fixed in v2, and the core thread is
> back where it should be in the core model. This should address Nick's
> feedback on the v1 cover letter.

Already queued, but FWIW these all look good to me. Thanks, this is a
good base to add some more functions on too.

One thing is the core xscom regions seem to still overlap...

Thanks,
Nick

>
> v2 also adds Cedric's r-b, fixes the s/write/read/ mistakes, and is
> checkpatch clean.
>
> v1: https://lore.kernel.org/qemu-devel/20230630035547.80329-1-joel@jms.id.au/
>
> Joel Stanley (5):
>   ppc/pnv: quad xscom callbacks are P9 specific
>   ppc/pnv: Subclass quad xscom callbacks
>   ppc/pnv: Add P10 quad xscom model
>   ppc/pnv: Add P10 core xscom model
>   ppc/pnv: Return zero for core thread state xscom
>
>  include/hw/ppc/pnv_core.h  |  13 ++-
>  include/hw/ppc/pnv_xscom.h |   2 +-
>  hw/ppc/pnv.c               |  11 ++-
>  hw/ppc/pnv_core.c          | 165 +++++++++++++++++++++++++++++++------
>  4 files changed, 162 insertions(+), 29 deletions(-)