Re: [PATCH] pnv/xive: Print CPU target in all TIMA traces

[Cédric Le Goater]

On 7/5/23 13:26, Philippe Mathieu-Daudé wrote:
> On 5/7/23 13:18, Cédric Le Goater wrote:
> > On 7/5/23 13:12, Philippe Mathieu-Daudé wrote:
> > > On 5/7/23 13:00, Frederic Barrat wrote:
> > > > Add the CPU target in the trace when reading/writing the TIMA
> > > > space. It was already done for other TIMA ops (notify, accept, ...),
> > > > only missing for those 2. Useful for debug and even more now that we
> > > > experiment with SMT.
> > > >
> > > > Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
> > > > ---
> > > >   hw/intc/trace-events | 4 ++--
> > > >   hw/intc/xive.c       | 4 ++--
> > > >   2 files changed, 4 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/hw/intc/trace-events b/hw/intc/trace-events
> > > > index 5c6094c457..36ff71f947 100644
> > > > --- a/hw/intc/trace-events
> > > > +++ b/hw/intc/trace-events
> > > > @@ -265,8 +265,8 @@ xive_source_esb_read(uint64_t addr, uint32_t srcno, uint64_t value) 
> > > > "@0x%"PRIx64
> > > >   xive_source_esb_write(uint64_t addr, uint32_t srcno, uint64_t value) "@0x%"PRIx64" 
> > > > IRQ 0x%x val=0x%"PRIx64
> > > >   xive_router_end_notify(uint8_t end_blk, uint32_t end_idx, uint32_t end_data) "END 
> > > > 0x%02x/0x%04x -> enqueue 0x%08x"
> > > >   xive_router_end_escalate(uint8_t end_blk, uint32_t end_idx, uint8_t esc_blk, uint32_t 
> > > > esc_idx, uint32_t end_data) "END 0x%02x/0x%04x -> escalate END 0x%02x/0x%04x data 
> > > > 0x%08x"
> > > > -xive_tctx_tm_write(uint64_t offset, unsigned int size, uint64_t value) 
> > > > "@0x%"PRIx64" sz=%d val=0x%" PRIx64
> > > > -xive_tctx_tm_read(uint64_t offset, unsigned int size, uint64_t value) "@0x%"PRIx64" 
> > > > sz=%d val=0x%" PRIx64
> > > > +xive_tctx_tm_write(uint32_t index, uint64_t offset, unsigned int size, uint64_t value) 
> > > > "target=%d @0x%"PRIx64" sz=%d val=0x%" PRIx64
> > > > +xive_tctx_tm_read(uint32_t index, uint64_t offset, unsigned int size, uint64_t value) 
> > > > "target=%d @0x%"PRIx64" sz=%d val=0x%" PRIx64
> > >
> > > "target" is kinda confusing, what about:
> > >
> > > xive_tctx_tm_read(uint32_t cpu_index, ...) "cpu=%d @0x%"PRIx64" ...
> >
> > An interrupt 'source' is served by a 'target', a target could be a CPU,
> > a vCPU id, a group of vCPU, a process id.
> >
> > 'target' is part of the XIVE nomenclature, in HW specs, in drivers, FW,
> > Linux, KVM, and models in QEMU. It is fine.
>
> Ah OK. Then xive_tctx_tm_read(uint32_t target, ...).

better indeed. What would be good to know also, is which vCPU is currently
dispatched on the HW thread. The info is in W2 of the ring being accessed.

Thanks,

C.