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[PATCH 2/3] ppc/pegasos2: Fix reg property of ROM BARs
From: |
BALATON Zoltan |
Subject: |
[PATCH 2/3] ppc/pegasos2: Fix reg property of ROM BARs |
Date: |
Wed, 19 Jul 2023 02:32:55 +0200 (CEST) |
The register offset of the ROM BAR is 0x30 not 0x28. This fixes the
reg property entry of the ROM region in the device tree.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/ppc/pegasos2.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 4a2ab35f19..8ed13a42a2 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -766,7 +766,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void
*opaque)
if (!d->io_regions[i].size) {
continue;
}
- cells[j] = cpu_to_be32(d->devfn << 8 | (PCI_BASE_ADDRESS_0 + i * 4));
+ cells[j] = PCI_BASE_ADDRESS_0 + i * 4;
+ if (cells[j] == 0x28) {
+ cells[j] = 0x30;
+ }
+ cells[j] = cpu_to_be32(d->devfn << 8 | cells[j]);
if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
cells[j] |= cpu_to_be32(1 << 24);
} else {
--
2.30.9