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[PULL 46/56] hw/i386/q35: Simplify pc_q35_init() since PCI is always ena
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 46/56] hw/i386/q35: Simplify pc_q35_init() since PCI is always enabled |
Date: |
Thu, 15 Feb 2024 18:57:40 +0100 |
We can not create the Q35 machine without PCI, so simplify
pc_q35_init() removing pointless checks.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240213041952.58840-1-philmd@linaro.org>
---
hw/i386/pc_q35.c | 32 ++++++++++----------------------
1 file changed, 10 insertions(+), 22 deletions(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index b7c69d55d6..a785bf7366 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -130,8 +130,7 @@ static void pc_q35_init(MachineState *machine)
ISADevice *rtc_state;
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *system_io = get_system_io();
- MemoryRegion *pci_memory;
- MemoryRegion *rom_memory;
+ MemoryRegion *pci_memory = g_new(MemoryRegion, 1);
GSIState *gsi_state;
ISABus *isa_bus;
int i;
@@ -143,6 +142,8 @@ static void pc_q35_init(MachineState *machine)
bool keep_pci_slot_hpc;
uint64_t pci_hole64_size = 0;
+ assert(pcmc->pci_enabled);
+
/* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
* and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
* also known as MMCFG).
@@ -189,16 +190,6 @@ static void pc_q35_init(MachineState *machine)
kvmclock_create(pcmc->kvmclock_create_always);
}
- /* pci enabled */
- if (pcmc->pci_enabled) {
- pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
- rom_memory = pci_memory;
- } else {
- pci_memory = NULL;
- rom_memory = system_memory;
- }
-
pc_guest_info_init(pcms);
if (pcmc->smbios_defaults) {
@@ -212,14 +203,13 @@ static void pc_q35_init(MachineState *machine)
/* create pci host bus */
phb = OBJECT(qdev_new(TYPE_Q35_HOST_DEVICE));
- if (pcmc->pci_enabled) {
- pci_hole64_size = object_property_get_uint(phb,
-
PCI_HOST_PROP_PCI_HOLE64_SIZE,
- &error_abort);
- }
+ pci_hole64_size = object_property_get_uint(phb,
+ PCI_HOST_PROP_PCI_HOLE64_SIZE,
+ &error_abort);
/* allocate ram and load rom/bios */
- pc_memory_init(pcms, system_memory, rom_memory, pci_hole64_size);
+ memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
+ pc_memory_init(pcms, system_memory, pci_memory, pci_hole64_size);
object_property_add_child(OBJECT(machine), "q35", phb);
object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM,
@@ -243,7 +233,7 @@ static void pc_q35_init(MachineState *machine)
pcms->bus = host_bus;
/* irq lines */
- gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
+ gsi_state = pc_gsi_create(&x86ms->gsi, true);
/* create ISA bus */
lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC),
@@ -286,9 +276,7 @@ static void pc_q35_init(MachineState *machine)
pc_i8259_create(isa_bus, gsi_state->i8259_irq);
}
- if (pcmc->pci_enabled) {
- ioapic_init_gsi(gsi_state, "q35");
- }
+ ioapic_init_gsi(gsi_state, "q35");
if (tcg_enabled()) {
x86_register_ferr_irq(x86ms->gsi[13]);
--
2.41.0
- [PULL 41/56] hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in(), (continued)
- [PULL 41/56] hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in(), Philippe Mathieu-Daudé, 2024/02/15
- [PULL 39/56] hw/sparc/leon3: implement multiprocessor, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 42/56] hw/sparc/leon3: Pass DeviceState opaque argument to leon3_start_cpu(), Philippe Mathieu-Daudé, 2024/02/15
- [PULL 43/56] hw/sparc/leon3: Initialize GPIO before realizing CPU devices, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 45/56] MAINTAINERS: Add myself as reviewer for TCG Plugins, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 44/56] MAINTAINERS: replace Fabien by myself as Leon3 maintainer, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 47/56] hw/i386/q35: Use DEVICE() cast macro with PCIDevice object, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 48/56] hw/ide/ahci: Expose AHCIPCIState structure, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 49/56] hw/ide/ahci: Rename AHCI PCI function as 'pdev', Philippe Mathieu-Daudé, 2024/02/15
- [PULL 50/56] hw/ide/ahci: Inline ahci_get_num_ports(), Philippe Mathieu-Daudé, 2024/02/15
- [PULL 46/56] hw/i386/q35: Simplify pc_q35_init() since PCI is always enabled,
Philippe Mathieu-Daudé <=
- [PULL 52/56] hw/ide/ahci: Convert AHCIState::ports to unsigned, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 51/56] hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs(), Philippe Mathieu-Daudé, 2024/02/15
- [PULL 53/56] hw/ide/ahci: Do not pass 'ports' argument to ahci_realize(), Philippe Mathieu-Daudé, 2024/02/15
- [PULL 54/56] hw/ide/ahci: Remove SysbusAHCIState::num_ports field, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 56/56] hw/ide/ich9: Use AHCIPCIState typedef, Philippe Mathieu-Daudé, 2024/02/15
- [PULL 55/56] hw/ide/ahci: Move SysBus definitions to 'ahci-sysbus.h', Philippe Mathieu-Daudé, 2024/02/15
- Re: [PULL 00/56] Misc HW patches for 2024-02-15, Peter Maydell, 2024/02/16