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Re: [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 re
From: |
Cornelia Huck |
Subject: |
Re: [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 register |
Date: |
Mon, 25 Mar 2024 15:37:18 +0100 |
User-agent: |
Notmuch/0.37 (https://notmuchmail.org) |
On Mon, Mar 25 2024, Cédric Le Goater <clg@kaod.org> wrote:
> On 3/21/24 11:04, Saif Abrar wrote:
>> PHB updates the register PCIE Link-Control-2.
>> Set the write-mask bits for TLS, ENTER_COMP, TX_MARGIN,
>> HASD, MOD_COMP, COMP_SOS and COMP_P_DE.
>
>
> You should resend this patch independently of the PowerNV PHB changes.
>
>
> Thanks,
>
> C.
>
>
>
>> Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com>
>> ---
>> hw/pci/pcie.c | 6 ++++++
>> include/standard-headers/linux/pci_regs.h | 3 +++
>> 2 files changed, 9 insertions(+)
This patch also needs to be split: the code under standard-headers/ is
updated via a Linux headers update, which should either be a full update
against a released kernel version (can be -rc), or a placeholder patch
if the changes have not yet been merged.
- [PATCH 06/10] pnv/phb4: Set link-active status in HPSTAT and LMR registers, (continued)
- [PATCH 05/10] pnv/phb4: Implement write-clear and return 1's on unimplemented reg read, Saif Abrar, 2024/03/21
- [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 register, Saif Abrar, 2024/03/21
- [PATCH 08/10] pnv/phb4: Implement IODA PCT table, Saif Abrar, 2024/03/21
- [PATCH 01/10] qtest/phb4: Add testbench for PHB4, Saif Abrar, 2024/03/21
- [PATCH 04/10] pnv/phb4: Implement read-only and write-only bits of registers, Saif Abrar, 2024/03/21
- [PATCH 02/10] pnv/phb4: Add reset logic to PHB4, Saif Abrar, 2024/03/21
- [PATCH 03/10] pnv/phb4: Implement sticky reset logic in PHB4, Saif Abrar, 2024/03/21