Re: [Qemu-riscv] [PATCH for 3.1] RISC-V: Respect fences for user-only emulators

[Richard Henderson]

On 11/9/18 8:19 PM, Palmer Dabbelt wrote:
> Our current fence implementation ignores fences for the user-only
> configurations.  This is incorrect but unlikely to manifest: it requires
> multi-threaded user-only code that takes advantage of the weakness in
> the host's memory model and can be inlined by TCG.
> 
> This patch simply treats fences the same way for all our emulators.
> I've given it to testing as I don't want to construct a test that would
> actually trigger the failure.
> 
> Our fence implementation has an additional deficiency where we map all
> RISC-V fences to full fences.  Now that we have a formal memory model
> for RISC-V we can start to take advantage of the strength bits on our
> fence instructions.  This requires a bit more though, so I'm going to
> split it out because the implementation is still correct without taking
> advantage of these weaker fences.
> 
> Thanks to Richard Henderson for pointing out both of the issues.
> 
> Signed-off-by: Palmer Dabbelt <address@hidden>
> ---
>  target/riscv/translate.c | 2 --
>  1 file changed, 2 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~