[Qemu-riscv] Contribution procedures for RISC-V QEMU

[Fabien Chouteau]

Hi everyone,

I have identified two problems with sifive_clint.c in qemu.org branch.

One of them seems to be fixed in github.com/riscv/riscv-qemu/commit/6835068 but
not merged in the qemu.org.

The other is about integer overflow in sifive_clint_write_timecmp() and not
fixed anywhere, as far as I know.

So I have two questions:

 - What is the contribution procedure for RISC-V QEMU? Should I send a patch
   here or use GitHub?

 - When will `6835068` be merged in qemu.org branch?

Thanks in advance,