[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-riscv] [PATCH 1/2] riscv: sifive_u: Do not create hard-coded p
|
From: |
Bin Meng |
|
Subject: |
Re: [Qemu-riscv] [PATCH 1/2] riscv: sifive_u: Do not create hard-coded phandles in DT |
|
Date: |
Wed, 26 Jun 2019 09:47:15 +0800 |
Hi,
On Sat, May 18, 2019 at 5:34 AM Alistair Francis
<address@hidden> wrote:
>
> On Fri, 2019-05-17 at 08:51 -0700, Bin Meng wrote:
> > At present the cpu, plic and ethclk nodes' phandles are hard-coded
> > to 1/2/3 in DT. If we configure more than 1 cpu for the machine,
> > all cpu nodes' phandles conflict with each other as they are all 1.
> > Fix it by removing the hardcode.
> >
> > Signed-off-by: Bin Meng <address@hidden>
>
> Reviewed-by: Alistair Francis <address@hidden>
>
Can this go in the 4.1 PR?
Regards,
Bin
- Re: [Qemu-riscv] [PATCH 1/2] riscv: sifive_u: Do not create hard-coded phandles in DT,
Bin Meng <=