Re: [PATCH v5 51/60] target/riscv: set-X-first mask bit

qemu-riscv

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Re: [PATCH v5 51/60] target/riscv: set-X-first mask bit

From:	Richard Henderson
Subject:	Re: [PATCH v5 51/60] target/riscv: set-X-first mask bit
Date:	Sun, 15 Mar 2020 00:26:32 -0700
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1

[ Patch didn't make it to the list, so reviewing

https://github.com/romanheros/qemu/commit/60668e86d94ffa48adb2f9c346753cf77f582686
]

Reviewed-by: Richard Henderson <address@hidden>

It should be possible to rewrite the helpers in units of uint64_t.  The
unmasked path is easy; the masked path is more complicated.


r~

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Re: [PATCH v5 57/60] target/riscv: vector slide instructions, (continued)
- [PATCH v5 58/60] target/riscv: vector register gather instruction, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 58/60] target/riscv: vector register gather instruction, Richard Henderson, 2020/03/15
- [PATCH v5 59/60] target/riscv: vector compress instruction, LIU Zhiwei, 2020/03/12
- [PATCH v5 60/60] target/riscv: configure and turn on vector extension from command line, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 60/60] target/riscv: configure and turn on vector extension from command line, Alistair Francis, 2020/03/13
    - Re: [PATCH v5 60/60] target/riscv: configure and turn on vector extension from command line, LIU Zhiwei, 2020/03/13
- Re: [PATCH v5 00/60] target/riscv: support vector extension v0.7.1, no-reply, 2020/03/12
- Re: [PATCH v5 35/60] target/riscv: vector floating-point square-root instruction, Richard Henderson, 2020/03/15
- Re: [PATCH v5 51/60] target/riscv: set-X-first mask bit, Richard Henderson <=
- Re: [PATCH v5 59/60] target/riscv: vector compress instruction, Richard Henderson, 2020/03/15

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