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Re: [PATCH v5 24/60] target/riscv: vector single-width averaging add and
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract |
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Date: |
Sun, 15 Mar 2020 16:27:32 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 3/15/20 4:23 PM, LIU Zhiwei wrote:
> Many other fixed point instructions also need vxsat besides vxsrm.
Ah yes.
> In that cases, can I just define OPIVV2_RM like this:
>
> #define OPIVV2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \
> static inline void \
> do_##NAME(void *vd, void *vs1, void *vs2, int i, \
> CPURISCVState *env, int vxrm) \
> { \
> TX1 s1 = *((T1 *)vs1 + HS1(i)); \
> TX2 s2 = *((T2 *)vs2 + HS2(i)); \
> *((TD *)vd + HD(i)) = OP(env, vxrm, s2, s1); \
> }
>
> static inline int32_t aadd32(|__attribute__((unused)) |CPURISCVState *env,
> int vxrm, int32_t a, int32_t b)
You can drop the unused. We don't turn on warnings for unused arguments, as we
have a *lot* of them for exactly this reason -- keeping a common functional
interface.
> {
> int64_t res = (int64_t)a + b;
> uint8_t round = get_round(vxrm, res, 1);
>
> return (res >> 1) + round;
> }
>
>
> In this way， I can write just one OPIVV2_RM instead of (OPIVV2_RM,
> OPIVV2_RM_ENV, OPIVV2_ENV).
Yes, that's fine.
r~
- Re: [PATCH v5 22/60] target/riscv: vector integer merge and move instructions, (continued)
[PATCH v5 23/60] target/riscv: vector single-width saturating add and subtract, LIU Zhiwei, 2020/03/12
[PATCH v5 24/60] target/riscv: vector single-width averaging add and subtract, LIU Zhiwei, 2020/03/12
[PATCH v5 25/60] target/riscv: vector single-width fractional multiply with rounding and saturation, LIU Zhiwei, 2020/03/12
[PATCH v5 26/60] target/riscv: vector widening saturating scaled multiply-add, LIU Zhiwei, 2020/03/12
[PATCH v5 27/60] target/riscv: vector single-width scaling shift instructions, LIU Zhiwei, 2020/03/12
[PATCH v5 28/60] target/riscv: vector narrowing fixed-point clip instructions, LIU Zhiwei, 2020/03/12
[PATCH v5 29/60] target/riscv: vector single-width floating-point add/subtract instructions, LIU Zhiwei, 2020/03/12