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Re: [PATCH 08/15] hw/riscv: sifive_gpio: Do not blindly trigger output I
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From: |
Alistair Francis |
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Subject: |
Re: [PATCH 08/15] hw/riscv: sifive_gpio: Do not blindly trigger output IRQs |
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Date: |
Mon, 15 Jun 2020 09:28:18 -0700 |
On Mon, Jun 8, 2020 at 7:24 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> At present the GPIO output IRQs are triggered each time any GPIO
> register is written. However this is not correct. We should only
> trigger the output IRQ when the pin is configured as output enable.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
>
> hw/riscv/sifive_gpio.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_gpio.c b/hw/riscv/sifive_gpio.c
> index 0d0fd2b..aac6b44 100644
> --- a/hw/riscv/sifive_gpio.c
> +++ b/hw/riscv/sifive_gpio.c
> @@ -76,7 +76,9 @@ static void update_state(SIFIVEGPIOState *s)
> actual_value = pull;
> }
>
> - qemu_set_irq(s->output[i], actual_value);
> + if (output_en) {
> + qemu_set_irq(s->output[i], actual_value);
> + }
>
> /* Input value */
> ival = input_en && actual_value;
> --
> 2.7.4
>
>
- [PATCH 00/15] hw/riscv: sifive_u: Add GPIO and Mode Select (MSEL[3:0]) support, Bin Meng, 2020/06/08
- [PATCH 02/15] hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions, Bin Meng, 2020/06/08
- [PATCH 01/15] hw/riscv: sifive_e: Remove the riscv_ prefix of the machine* and soc* functions, Bin Meng, 2020/06/08
- [PATCH 04/15] hw/riscv: sifive_u: Generate device tree node for OTP, Bin Meng, 2020/06/08
- [PATCH 03/15] hw/riscv: sifive_u: Simplify the GEM IRQ connect code a little bit, Bin Meng, 2020/06/08
- [PATCH 08/15] hw/riscv: sifive_gpio: Do not blindly trigger output IRQs, Bin Meng, 2020/06/08
- Re: [PATCH 08/15] hw/riscv: sifive_gpio: Do not blindly trigger output IRQs,
Alistair Francis <=
- [PATCH 05/15] hw/riscv: sifive_gpio: Clean up the codes, Bin Meng, 2020/06/08
- [PATCH 06/15] hw/riscv: sifive_gpio: Add a new 'ngpio' property, Bin Meng, 2020/06/08
- [PATCH 07/15] hw/riscv: sifive_u: Hook a GPIO controller, Bin Meng, 2020/06/08
- [PATCH 09/15] hw/riscv: sifive_u: Add reset functionality, Bin Meng, 2020/06/08
- [PATCH 10/15] hw/riscv: sifive_u: Rename serial property get/set functions to a generic name, Bin Meng, 2020/06/08