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[PATCH] riscv: Add OpenTitan Big Number (OTBN) device address
From: |
Julio Faracco |
Subject: |
[PATCH] riscv: Add OpenTitan Big Number (OTBN) device address |
Date: |
Mon, 6 Jul 2020 23:07:28 -0300 |
This commit adds basics skecthes to implemente a OTBN unit.
OTBN has address 0x50000000 and size 0x400000.
For further reference, see OTBN docummentation:
https://docs.opentitan.org/hw/ip/otbn/doc/
Signed-off-by: Julio Faracco <jcfaracco@gmail.com>
---
hw/riscv/opentitan.c | 5 ++++-
include/hw/riscv/opentitan.h | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 19223e4c29..8a5d060b57 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -50,7 +50,8 @@ static const struct MemmapEntry {
[IBEX_ALERT_HANDLER] = { 0x40130000, 0x10000 },
[IBEX_NMI_GEN] = { 0x40140000, 0x10000 },
[IBEX_USBDEV] = { 0x40150000, 0x10000 },
- [IBEX_PADCTRL] = { 0x40160000, 0x10000 }
+ [IBEX_PADCTRL] = { 0x40160000, 0x10000 },
+ [IBEX_OTBN] = { 0x50000000, 0x400000 }
};
static void opentitan_board_init(MachineState *machine)
@@ -183,6 +184,8 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc,
Error **errp)
memmap[IBEX_USBDEV].base, memmap[IBEX_USBDEV].size);
create_unimplemented_device("riscv.lowrisc.ibex.padctrl",
memmap[IBEX_PADCTRL].base, memmap[IBEX_PADCTRL].size);
+ create_unimplemented_device("riscv.lowrisc.ibex.otbn",
+ memmap[IBEX_PADCTRL].base, memmap[IBEX_OTBN].size);
}
static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data)
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
index 8f29b9cbbf..c739d44fbc 100644
--- a/include/hw/riscv/opentitan.h
+++ b/include/hw/riscv/opentitan.h
@@ -68,6 +68,7 @@ enum {
IBEX_NMI_GEN,
IBEX_USBDEV,
IBEX_PADCTRL,
+ IBEX_OTBN,
};
enum {
--
2.25.1
- [PATCH] riscv: Add OpenTitan Big Number (OTBN) device address,
Julio Faracco <=