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Re: [RFC 63/65] fpu: implement full set compare for fp16
From: |
Alex Bennée |
Subject: |
Re: [RFC 63/65] fpu: implement full set compare for fp16 |
Date: |
Fri, 10 Jul 2020 13:24:17 +0100 |
User-agent: |
mu4e 1.5.4; emacs 28.0.50 |
frank.chang@sifive.com writes:
> From: Kito Cheng <kito.cheng@sifive.com>
>
> Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
> Signed-off-by: Frank Chang <frank.chang@sifive.com>
NACK I'm afraid. What's wrong with the exiting float_compare support?
Even if you did want to bring in aliases for these functions within
softfloat itself the correct way would be to use the decomposed
float_compare support for a bunch of stubs and not restore the old style
error prone bit masking code.
> ---
> fpu/softfloat.c | 240 ++++++++++++++++++++++++++++++++++++++++
> include/fpu/softfloat.h | 8 ++
> 2 files changed, 248 insertions(+)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 028b857167..8bebea1142 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -401,6 +401,34 @@ float64_gen2(float64 xa, float64 xb, float_status *s,
> return soft(ua.s, ub.s, s);
> }
>
> +/*----------------------------------------------------------------------------
> +| Returns the fraction bits of the half-precision floating-point value `a'.
> +*----------------------------------------------------------------------------*/
> +
> +static inline uint32_t extractFloat16Frac(float16 a)
> +{
> + return float16_val(a) & 0x3ff;
> +}
For example you'll notice this function was deleted in e6b405fe00
--
Alex Bennée
- [RFC 50/65] target/riscv: rvv-0.9: floating-point/integer type-convert instructions, (continued)
[RFC 63/65] fpu: implement full set compare for fp16, frank . chang, 2020/07/10
- Re: [RFC 63/65] fpu: implement full set compare for fp16,
Alex Bennée <=
[RFC 11/65] target/riscv: rvv-0.9: add fractional LMUL, VTA and VMA, frank . chang, 2020/07/10
[RFC 12/65] target/riscv: rvv-0.9: update check functions, frank . chang, 2020/07/10
[RFC 17/65] target/riscv: rvv-0.9: fault-only-first unit stride load, frank . chang, 2020/07/10
[RFC 18/65] target/riscv: rvv-0.9: amo operations, frank . chang, 2020/07/10
[RFC 29/65] target/riscv: rvv-0.9: integer scalar move instructions, frank . chang, 2020/07/10