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[RESEND PATCH 0/9] hw/riscv: microchip_pfsoc: Support factory HSS boot o
From: |
Bin Meng |
Subject: |
[RESEND PATCH 0/9] hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box |
Date: |
Tue, 27 Oct 2020 22:17:31 +0800 |
From: Bin Meng <bin.meng@windriver.com>
At present the DDR memory controller is not modeled, hence the factory
HSS firmware does not boot out of the box on QEMU. A modified HSS is
required per the instructions on [1].
This series adds the missing DDR memory controller support to PolarFire
SoC, as well as adding various misc models to support the DDR memory
initialization done by HSS.
With this series, the unmodified HSS image can boot on QEMU out of the
box. The latest SD card image [2] released by Microchip was used for
testing which includes the pre-built U-Boot, device tree blob and Linux
kernel for the Icicle Kit. The instructions on [1] have been updated to
include the information on HSS and SD card image.
[1]
https://wiki.qemu.org/Documentation/Platforms/RISCV#Microchip_PolarFire_SoC_Icicle_Kit
[2]
ftp://ftpsoc.microsemi.com/outgoing/core-image-minimal-dev-icicle-kit-es-sd-20201009141623.rootfs.wic.gz
Bin Meng (9):
hw/misc: Add Microchip PolarFire SoC DDR Memory Controller support
hw/riscv: microchip_pfsoc: Connect DDR memory controller modules
hw/misc: Add Microchip PolarFire SoC IOSCB module support
hw/riscv: microchip_pfsoc: Connect the IOSCB module
hw/misc: Add Microchip PolarFire SoC SYSREG module support
hw/riscv: microchip_pfsoc: Connect the SYSREG module
hw/riscv: microchip_pfsoc: Map debug memory
hw/riscv: microchip_pfsoc: Correct DDR memory map
hw/riscv: microchip_pfsoc: Hook the I2C1 controller
MAINTAINERS | 6 +
hw/misc/Kconfig | 9 ++
hw/misc/mchp_pfsoc_dmc.c | 216 +++++++++++++++++++++++++
hw/misc/mchp_pfsoc_ioscb.c | 242 ++++++++++++++++++++++++++++
hw/misc/mchp_pfsoc_sysreg.c | 99 ++++++++++++
hw/misc/meson.build | 3 +
hw/riscv/Kconfig | 3 +
hw/riscv/microchip_pfsoc.c | 103 ++++++++++--
include/hw/misc/mchp_pfsoc_dmc.h | 56 +++++++
include/hw/misc/mchp_pfsoc_ioscb.h | 50 ++++++
include/hw/misc/mchp_pfsoc_sysreg.h | 39 +++++
include/hw/riscv/microchip_pfsoc.h | 17 +-
12 files changed, 828 insertions(+), 15 deletions(-)
create mode 100644 hw/misc/mchp_pfsoc_dmc.c
create mode 100644 hw/misc/mchp_pfsoc_ioscb.c
create mode 100644 hw/misc/mchp_pfsoc_sysreg.c
create mode 100644 include/hw/misc/mchp_pfsoc_dmc.h
create mode 100644 include/hw/misc/mchp_pfsoc_ioscb.h
create mode 100644 include/hw/misc/mchp_pfsoc_sysreg.h
--
2.25.1