Re: [PATCH v7 4/6] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions

[Richard Henderson]

On 1/10/21 8:51 AM, Alexey Baturo wrote:
> Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com>
> ---
>  target/riscv/insn_trans/trans_rva.c.inc |  3 +++
>  target/riscv/insn_trans/trans_rvd.c.inc |  2 ++
>  target/riscv/insn_trans/trans_rvf.c.inc |  2 ++
>  target/riscv/insn_trans/trans_rvi.c.inc |  2 ++
>  target/riscv/translate.c                | 14 ++++++++++++++
>  5 files changed, 23 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



> +static void gen_pm_adjust_address(DisasContext *s,
> +                                  TCGv_i64      dst,
> +                                  TCGv_i64      src)

Don't bother aligning variables like this.  That just leads to additional
changes when code is adjusted later.


r~