qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] target/riscv: Prevent lost illegal instruction exceptions


From: Richard Henderson
Subject: Re: [PATCH] target/riscv: Prevent lost illegal instruction exceptions
Date: Fri, 19 Mar 2021 09:22:41 -0600
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1

On 3/16/21 9:03 AM, Georg Kotheimer wrote:
When decode_insn16() fails, we fall back to decode_RV32_64C() for
further compressed instruction decoding.

I think this is all dead code now. Certainly c.ld/c.sd are in insn16-64.decode and c.flw/c.fsw are in insn16-32.decode.

Digging, we failed to remove these functions here: f330433b363.

You are absolutely right there's a missing

              if (!decode_insn16(ctx, opcode)) {
                  /* fall back to old decoder */
-                decode_RV32_64C(ctx, opcode);
+                if (!decode_RV32_64C(ctx, opcode)) {
+                    gen_exception_illegal(ctx);

exception here, but we can remove the last remnants of the old decoder instead of patching them.


r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]