Re: [PATCH 1/2] target/riscv: csr: Fix hmode32() for RV64

[Alistair Francis]

On Tue, Mar 30, 2021 at 10:18 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> hmode32() should return -RISCV_EXCP_ILLEGAL_INST for RV64.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Thanks for the patch.

There is already a patch on list to fix this: "target/riscv: Fix
32-bit HS mode access permissions"

Alistair

> ---
>
>  target/riscv/csr.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index d2585395bf..2bad396f64 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -177,7 +177,7 @@ static int hmode(CPURISCVState *env, int csrno)
>  static int hmode32(CPURISCVState *env, int csrno)
>  {
>      if (!riscv_cpu_is_32bit(env)) {
> -        return 0;
> +        return -RISCV_EXCP_ILLEGAL_INST;
>      }
>
>      return hmode(env, csrno);
> --
> 2.25.1
>
>