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[PATCH v2 3/8] target/riscv: Add the ePMP feature
From: |
Alistair Francis |
Subject: |
[PATCH v2 3/8] target/riscv: Add the ePMP feature |
Date: |
Fri, 9 Apr 2021 08:20:14 -0400 |
The spec is avaliable at:
https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
target/riscv/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 842d3ab810..13a08b86f6 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -81,6 +81,7 @@
enum {
RISCV_FEATURE_MMU,
RISCV_FEATURE_PMP,
+ RISCV_FEATURE_EPMP,
RISCV_FEATURE_MISA
};
--
2.31.0
- [PATCH v2 0/8] RISC-V: Add support for ePMP v0.9.1, Alistair Francis, 2021/04/09
- [PATCH v2 1/8] target/riscv: Fix the PMP is locked check when using TOR, Alistair Francis, 2021/04/09
- [PATCH v2 3/8] target/riscv: Add the ePMP feature,
Alistair Francis <=
- [PATCH v2 4/8] target/riscv: Add ePMP CSR access functions, Alistair Francis, 2021/04/09
- [PATCH v2 2/8] target/riscv: Define ePMP mseccfg, Alistair Francis, 2021/04/09
- [PATCH v2 5/8] target/riscv: Implementation of enhanced PMP (ePMP), Alistair Francis, 2021/04/09
- [PATCH v2 6/8] target/riscv: Add a config option for ePMP, Alistair Francis, 2021/04/09
- [PATCH v2 8/8] target/riscv: Add ePMP support for the Ibex CPU, Alistair Francis, 2021/04/09
- [PATCH v2 7/8] target/riscv/pmp: Remove outdated comment, Alistair Francis, 2021/04/09