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Re: [PATCH v3 08/10] target/riscv: Consolidate RV32/64 32-bit instructio


From: Richard Henderson
Subject: Re: [PATCH v3 08/10] target/riscv: Consolidate RV32/64 32-bit instructions
Date: Sun, 25 Apr 2021 16:53:14 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1

On 4/25/21 3:58 PM, Alistair Francis wrote:
On Sun, Apr 25, 2021 at 3:08 AM Richard Henderson
<richard.henderson@linaro.org> wrote:

On 4/23/21 8:34 PM, Alistair Francis wrote:
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -74,8 +74,6 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext)

   #ifdef TARGET_RISCV32
   # define is_32bit(ctx)  true
-#elif defined(CONFIG_USER_ONLY)
-# define is_32bit(ctx)  false
   #else
   static inline bool is_32bit(DisasContext *ctx)
   {

Rebase error?

This is required to avoid warnings/errors before this commit as
`is_32bit()` isn't called until this patch.

If !defined(TARGET_RISCV32) && defined(CONFIG_USER_ONLY), then is_32bit *is* false. This isn't system mode and it can't be changed.


r~



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