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From: | LIU Zhiwei |
Subject: | TCG op for 32 bit only cpu on qemu-riscv64 |
Date: | Mon, 7 Jun 2021 11:07:11 +0800 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 |
Hi Alistair, As I see, we are moving on to remove TARGET_RISCV64 macro. I have some questions:1) Which tcg op should use when translate an instruction for 32bit cpu. The tcg_*_i64, tcg_*_i32 or tcg_*_tl? I see some API such as gen_get_gpr that are using the tcg_*_tl. But I am not sure if it is
right for 32bit cpu.2) Do we should have a sign-extend 64 bit register(bit 31 as the sign bit) for 32 bit cpu?
Best Regards, Zhiwei
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