Re: [PATCH 09/15] hw/riscv: microchip_pfsoc: Fix the number of interrupt sources of PLIC

[Alistair Francis]

On Fri, Dec 2, 2022 at 12:11 AM Bin Meng <bmeng@tinylab.org> wrote:
>
> Per chapter 6.5.2 in [1], the number of interupt sources including
> interrupt source 0 should be 187.
>
> [1] PolarFire SoC MSS TRM:
> https://ww1.microchip.com/downloads/aemDocuments/documents/FPGA/ProductDocuments/ReferenceManuals/PolarFire_SoC_FPGA_MSS_Technical_Reference_Manual_VC.pdf
>
> Fixes: 56f6e31e7b7e ("hw/riscv: Initial support for Microchip PolarFire SoC 
> Icicle Kit board")
> Signed-off-by: Bin Meng <bmeng@tinylab.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>
>  include/hw/riscv/microchip_pfsoc.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/riscv/microchip_pfsoc.h 
> b/include/hw/riscv/microchip_pfsoc.h
> index a757b240e0..9720bac2d5 100644
> --- a/include/hw/riscv/microchip_pfsoc.h
> +++ b/include/hw/riscv/microchip_pfsoc.h
> @@ -150,7 +150,7 @@ enum {
>  #define MICROCHIP_PFSOC_MANAGEMENT_CPU_COUNT    1
>  #define MICROCHIP_PFSOC_COMPUTE_CPU_COUNT       4
>
> -#define MICROCHIP_PFSOC_PLIC_NUM_SOURCES        185
> +#define MICROCHIP_PFSOC_PLIC_NUM_SOURCES        187
>  #define MICROCHIP_PFSOC_PLIC_NUM_PRIORITIES     7
>  #define MICROCHIP_PFSOC_PLIC_PRIORITY_BASE      0x04
>  #define MICROCHIP_PFSOC_PLIC_PENDING_BASE       0x1000
> --
> 2.34.1
>
>