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[PATCH 10/12] hw/riscv/boot.c: introduce riscv_default_firmware_name()
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From: |
Bin Meng |
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Subject: |
[PATCH 10/12] hw/riscv/boot.c: introduce riscv_default_firmware_name() |
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Date: |
Tue, 27 Dec 2022 14:48:10 +0800 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Some boards are duplicating the 'riscv_find_and_load_firmware' call
because the 32 and 64 bits images have different names. Create
a function to handle this detail instead of hardcoding it in the boards.
Ideally we would bake this logic inside riscv_find_and_load_firmware(),
or even create a riscv_load_default_firmware(), but at this moment we
cannot infer whether the machine is running 32 or 64 bits without
accessing RISCVHartArrayState, which in turn can't be accessed via the
common code from boot.c. In the end we would exchange 'firmware_name'
for a flag with riscv_is_32bit(), which isn't much better than what we
already have today.
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Message-Id: <20221221182300.307900-6-dbarboza@ventanamicro.com>
Signed-off-by: Bin Meng <bmeng@tinylab.org>
---
include/hw/riscv/boot.h | 1 +
hw/riscv/boot.c | 9 +++++++++
hw/riscv/sifive_u.c | 11 ++++-------
hw/riscv/spike.c | 14 +++++---------
hw/riscv/virt.c | 10 +++-------
5 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
index c03e4e74c5..60cf320c88 100644
--- a/include/hw/riscv/boot.h
+++ b/include/hw/riscv/boot.h
@@ -37,6 +37,7 @@ target_ulong riscv_find_and_load_firmware(MachineState
*machine,
const char *default_machine_firmware,
hwaddr firmware_load_addr,
symbol_fn_t sym_cb);
+const char *riscv_default_firmware_name(RISCVHartArrayState *harts);
target_ulong riscv_load_firmware(const char *firmware_filename,
hwaddr firmware_load_addr,
symbol_fn_t sym_cb);
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 7361d5c0d8..e1a544b1d9 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -75,6 +75,15 @@ target_ulong
riscv_calc_kernel_start_addr(RISCVHartArrayState *harts,
}
}
+const char *riscv_default_firmware_name(RISCVHartArrayState *harts)
+{
+ if (riscv_is_32bit(harts)) {
+ return RISCV32_BIOS_BIN;
+ }
+
+ return RISCV64_BIOS_BIN;
+}
+
static char *riscv_find_firmware(const char *firmware_filename)
{
char *filename;
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index b139824aab..662ddf366d 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -532,6 +532,7 @@ static void sifive_u_machine_init(MachineState *machine)
MemoryRegion *flash0 = g_new(MemoryRegion, 1);
target_ulong start_addr = memmap[SIFIVE_U_DEV_DRAM].base;
target_ulong firmware_end_addr, kernel_start_addr;
+ const char *firmware_name;
uint32_t start_addr_hi32 = 0x00000000;
int i;
uint32_t fdt_load_addr;
@@ -594,13 +595,9 @@ static void sifive_u_machine_init(MachineState *machine)
break;
}
- if (riscv_is_32bit(&s->soc.u_cpus)) {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV32_BIOS_BIN, start_addr, NULL);
- } else {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV64_BIOS_BIN, start_addr, NULL);
- }
+ firmware_name = riscv_default_firmware_name(&s->soc.u_cpus);
+ firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
+ start_addr, NULL);
if (machine->kernel_filename) {
kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc.u_cpus,
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index ab0a945f8b..810a18f283 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -191,6 +191,7 @@ static void spike_board_init(MachineState *machine)
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
target_ulong firmware_end_addr, kernel_start_addr;
+ const char *firmware_name;
uint32_t fdt_load_addr;
uint64_t kernel_entry;
char *soc_name;
@@ -256,15 +257,10 @@ static void spike_board_init(MachineState *machine)
memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base,
mask_rom);
- if (riscv_is_32bit(&s->soc[0])) {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV32_BIOS_BIN, memmap[SPIKE_DRAM].base,
- htif_symbol_callback);
- } else {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV64_BIOS_BIN, memmap[SPIKE_DRAM].base,
- htif_symbol_callback);
- }
+ firmware_name = riscv_default_firmware_name(&s->soc[0]);
+ firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
+ memmap[SPIKE_DRAM].base,
+ htif_symbol_callback);
/* Load kernel */
if (machine->kernel_filename) {
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index a5bc7353b4..d8cf6385b5 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1240,6 +1240,7 @@ static void virt_machine_done(Notifier *notifier, void
*data)
MachineState *machine = MACHINE(s);
target_ulong start_addr = memmap[VIRT_DRAM].base;
target_ulong firmware_end_addr, kernel_start_addr;
+ const char *firmware_name = riscv_default_firmware_name(&s->soc[0]);
uint32_t fdt_load_addr;
uint64_t kernel_entry;
@@ -1259,13 +1260,8 @@ static void virt_machine_done(Notifier *notifier, void
*data)
}
}
- if (riscv_is_32bit(&s->soc[0])) {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV32_BIOS_BIN, start_addr, NULL);
- } else {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV64_BIOS_BIN, start_addr, NULL);
- }
+ firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
+ start_addr, NULL);
/*
* Init fw_cfg. Must be done before riscv_load_fdt, otherwise the device
--
2.34.1
- [PATCH 03/12] hw/char: riscv_htif: Drop useless assignment of memory region, (continued)
- [PATCH 03/12] hw/char: riscv_htif: Drop useless assignment of memory region, Bin Meng, 2022/12/27
- [PATCH 08/12] hw/riscv: spike: Remove the out-of-date comments, Bin Meng, 2022/12/27
- [PATCH 05/12] hw/char: riscv_htif: Move registers from CPUArchState to HTIFState, Bin Meng, 2022/12/27
- [PATCH 09/12] hw/riscv/boot.c: make riscv_find_firmware() static, Bin Meng, 2022/12/27
- [PATCH 10/12] hw/riscv/boot.c: introduce riscv_default_firmware_name(),
Bin Meng <=
- [PATCH 11/12] hw/riscv/boot.c: Introduce riscv_find_firmware(), Bin Meng, 2022/12/27
- [PATCH 12/12] hw/riscv: spike: Decouple create_fdt() dependency to ELF loading, Bin Meng, 2022/12/27
- Re: [PATCH 00/12] hw/riscv: Improve Spike HTIF emulation fidelity, Daniel Henrique Barboza, 2022/12/27