qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 2/4] target/riscv: Simplify getting RISCVCPU pointer from env


From: Alistair Francis
Subject: Re: [PATCH 2/4] target/riscv: Simplify getting RISCVCPU pointer from env
Date: Tue, 14 Mar 2023 15:24:37 +1000

On Thu, Mar 9, 2023 at 5:14 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> Use env_archcpu() to get RISCVCPU pointer from env directly.
>
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/pmu.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
> index b8e56d2b7b..a200741083 100644
> --- a/target/riscv/pmu.c
> +++ b/target/riscv/pmu.c
> @@ -223,7 +223,7 @@ bool riscv_pmu_ctr_monitor_instructions(CPURISCVState 
> *env,
>          return true;
>      }
>
> -    cpu = RISCV_CPU(env_cpu(env));
> +    cpu = env_archcpu(env);
>      if (!cpu->pmu_event_ctr_map) {
>          return false;
>      }
> @@ -249,7 +249,7 @@ bool riscv_pmu_ctr_monitor_cycles(CPURISCVState *env, 
> uint32_t target_ctr)
>          return true;
>      }
>
> -    cpu = RISCV_CPU(env_cpu(env));
> +    cpu = env_archcpu(env);
>      if (!cpu->pmu_event_ctr_map) {
>          return false;
>      }
> @@ -289,7 +289,7 @@ int riscv_pmu_update_event_map(CPURISCVState *env, 
> uint64_t value,
>                                 uint32_t ctr_idx)
>  {
>      uint32_t event_idx;
> -    RISCVCPU *cpu = RISCV_CPU(env_cpu(env));
> +    RISCVCPU *cpu = env_archcpu(env);
>
>      if (!riscv_pmu_counter_valid(cpu, ctr_idx) || !cpu->pmu_event_ctr_map) {
>          return -1;
> @@ -390,7 +390,7 @@ int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t 
> value, uint32_t ctr_idx)
>  {
>      uint64_t overflow_delta, overflow_at;
>      int64_t overflow_ns, overflow_left = 0;
> -    RISCVCPU *cpu = RISCV_CPU(env_cpu(env));
> +    RISCVCPU *cpu = env_archcpu(env);
>      PMUCTRState *counter = &env->pmu_ctrs[ctr_idx];
>
>      if (!riscv_pmu_counter_valid(cpu, ctr_idx) || !cpu->cfg.ext_sscofpmf) {
> --
> 2.25.1
>
>



reply via email to

[Prev in Thread] Current Thread [Next in Thread]