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[PATCH v2 0/5] target/riscv: Fix pointer mask related support


From: Weiwei Li
Subject: [PATCH v2 0/5] target/riscv: Fix pointer mask related support
Date: Wed, 29 Mar 2023 11:23:41 +0800

This patchset tries to fix some problem in current implementation for pointer 
mask, and add support for pointer mask of instruction fetch.

The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-pm-fix-v2

v2:
* drop some error patchs
* Add patch 2 and 3 to fix the new problems
* Add patch 4 and 5 to use PC-relative translation for pointer mask for 
instruction fetch

Weiwei Li (5):
  target/riscv: Fix pointer mask transformation for vector address
  target/riscv: Update cur_pmmask/base when xl changes
  target/riscv: Sync cpu_pc before update badaddr
  target/riscv: Add support for PC-relative translation
  target/riscv: Add pointer mask support for instruction fetch

 target/riscv/cpu.c                      | 33 +++++++++----
 target/riscv/cpu.h                      |  1 +
 target/riscv/cpu_helper.c               | 20 +++++++-
 target/riscv/csr.c                      | 11 +++--
 target/riscv/insn_trans/trans_rvi.c.inc | 42 +++++++++++++---
 target/riscv/translate.c                | 66 ++++++++++++++++++-------
 target/riscv/vector_helper.c            |  2 +-
 7 files changed, 134 insertions(+), 41 deletions(-)

-- 
2.25.1




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