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[Tinycc-devel] [PATCH 3/9] arm-asm: Support rotation for sxtb, sxth, uxt
From: |
Danny Milosavljevic |
Subject: |
[Tinycc-devel] [PATCH 3/9] arm-asm: Support rotation for sxtb, sxth, uxtb, uxth |
Date: |
Mon, 28 Dec 2020 02:44:07 +0100 |
---
arm-asm.c | 51 +++++++++++++++++++++++++++++++++++++++++----------
1 file changed, 41 insertions(+), 10 deletions(-)
diff --git a/arm-asm.c b/arm-asm.c
index ef75091..f672301 100644
--- a/arm-asm.c
+++ b/arm-asm.c
@@ -201,6 +201,9 @@ static void asm_unary_opcode(TCCState *s1, int token)
static void asm_binary_opcode(TCCState *s1, int token)
{
Operand ops[2];
+ Operand rotation;
+ uint32_t encoded_rotation = 0;
+ uint64_t amount;
parse_operand(s1, &ops[0]);
if (tok == ',')
next();
@@ -212,27 +215,55 @@ static void asm_binary_opcode(TCCState *s1, int token)
return;
}
- if (ops[1].type != OP_REG32)
+ if (ops[1].type != OP_REG32) {
expect("(source operand) register");
- else switch (ARM_INSTRUCTION_GROUP(token)) {
+ return;
+ }
+
+ if (tok == ',') {
+ next(); // skip ','
+ if (tok == TOK_ASM_ror) {
+ next(); // skip 'ror'
+ parse_operand(s1, &rotation);
+ if (rotation.type != OP_IM8) {
+ expect("immediate value for rotation");
+ return;
+ } else {
+ amount = rotation.e.v;
+ switch (amount) {
+ case 8:
+ encoded_rotation = 1 << 10;
+ break;
+ case 16:
+ encoded_rotation = 2 << 10;
+ break;
+ case 24:
+ encoded_rotation = 3 << 10;
+ break;
+ default:
+ expect("'8' or '16' or '24'");
+ return;
+ }
+ }
+ }
+ }
+ switch (ARM_INSTRUCTION_GROUP(token)) {
case TOK_ASM_clzeq:
+ if (encoded_rotation)
+ tcc_error("clz does not support rotation");
asm_emit_opcode(token, 0x16f0f10 | (ops[0].reg << 12) | ops[1].reg);
break;
case TOK_ASM_sxtbeq:
- /* TODO: optional ROR (8|16|24) */
- asm_emit_opcode(token, 0x6af0070 | (ops[0].reg << 12) | ops[1].reg);
+ asm_emit_opcode(token, 0x6af0070 | (ops[0].reg << 12) | ops[1].reg |
encoded_rotation);
break;
case TOK_ASM_sxtheq:
- /* TODO: optional ROR (8|16|24) */
- asm_emit_opcode(token, 0x6bf0070 | (ops[0].reg << 12) | ops[1].reg);
+ asm_emit_opcode(token, 0x6bf0070 | (ops[0].reg << 12) | ops[1].reg |
encoded_rotation);
break;
case TOK_ASM_uxtbeq:
- /* TODO: optional ROR (8|16|24) */
- asm_emit_opcode(token, 0x6ef0070 | (ops[0].reg << 12) | ops[1].reg);
+ asm_emit_opcode(token, 0x6ef0070 | (ops[0].reg << 12) | ops[1].reg |
encoded_rotation);
break;
case TOK_ASM_uxtheq:
- /* TODO: optional ROR (8|16|24) */
- asm_emit_opcode(token, 0x6ff0070 | (ops[0].reg << 12) | ops[1].reg);
+ asm_emit_opcode(token, 0x6ff0070 | (ops[0].reg << 12) | ops[1].reg |
encoded_rotation);
break;
default:
expect("binary instruction");
- [Tinycc-devel] [PATCH 0/9] Improve ARM inline assembler, Danny Milosavljevic, 2020/12/27
- [Tinycc-devel] [PATCH 4/9] arm-asm: Warn if regset registers are not specified in ascending order, Danny Milosavljevic, 2020/12/27
- [Tinycc-devel] [PATCH 2/9] arm-asm: For data processing instructions, support shifts and rotations., Danny Milosavljevic, 2020/12/27
- [Tinycc-devel] [PATCH 3/9] arm-asm: Support rotation for sxtb, sxth, uxtb, uxth,
Danny Milosavljevic <=
- [Tinycc-devel] [PATCH 7/9] arm-asm: Print a warning if asm_binary_opcode is used with SP as operand, Danny Milosavljevic, 2020/12/27
- [Tinycc-devel] [PATCH 1/9] arm-asm: Add lsl, lsr, asr, ror, rrx, Danny Milosavljevic, 2020/12/27
- [Tinycc-devel] [PATCH 5/9] arm-asm: Add error case in asm_multiplication_opcode, Danny Milosavljevic, 2020/12/27
- [Tinycc-devel] [PATCH 9/9] arm-asm: Raise error if asm_data_processing_opcode and asm_shift_opcode try to use PC for register-controlled shifts, Danny Milosavljevic, 2020/12/27
- [Tinycc-devel] [PATCH 6/9] arm-asm: Raise an error if asm_binary_opcode is used with PC as operand, Danny Milosavljevic, 2020/12/27
- [Tinycc-devel] [PATCH 8/9] arm-asm: Raise error if more than two operands are specified on mov, mvn, cmp, cmn, tst, teq, Danny Milosavljevic, 2020/12/27
- Re: [Tinycc-devel] [PATCH 0/9] Improve ARM inline assembler, Danny Milosavljevic, 2020/12/27