[Viuavm-commits] [SCM] Viua VM branch issue/169/using-multiple-register-sets-in-single-instruction updated. v0.8.4-878-ge9e9cf5

[git]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Viua VM".

The branch, issue/169/using-multiple-register-sets-in-single-instruction has 
been updated
       via  e9e9cf56c1ff94c982a23331772cf56ad00b6a80 (commit)
       via  6cb4f42f409cf8ab6604846f93418d4aa25d0a85 (commit)
      from  92f534395be15850ab5d392fcad7921fb55eafd7 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit e9e9cf56c1ff94c982a23331772cf56ad00b6a80
Author: Marek Marecki <address@hidden>
Date:   Sun Jan 29 14:22:49 2017 +0100

    Vector target may be in a different register set than pack

commit 6cb4f42f409cf8ab6604846f93418d4aa25d0a85
Author: Marek Marecki <address@hidden>
Date:   Sun Jan 29 14:22:21 2017 +0100

    Support explicit register sets for vec

-----------------------------------------------------------------------

Summary of changes:
 include/viua/bytecode/decoder/operands.h |  1 +
 src/bytecode/decoder/operands.cpp        |  7 +++++++
 src/cg/assembler/static_analysis.cpp     |  4 ++--
 src/cg/disassembler/disassembler.cpp     |  7 ++++++-
 src/cg/lex.cpp                           | 30 ++++++++++++++++++++++++++----
 src/cg/tools.cpp                         | 18 +++++++++++++++++-
 src/front/asm/generate.cpp               | 12 ++++++++----
 src/process/instr/vector.cpp             | 28 +++++++++++++++++-----------
 8 files changed, 84 insertions(+), 23 deletions(-)


hooks/post-receive
-- 
Viua VM