[Viuavm-commits] [SCM] Viua VM branch issue/177/5534fb2a/implement-bit-manipulation-instructions updated. v0.9.0-105-gca28418

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- Log -----------------------------------------------------------------
commit ca284183d63701a735642373f86029468e73bc39
Author: Marek Marecki <address@hidden>
Date:   Sun Jul 16 20:50:56 2017 +0200

    Test "bitxor" (bitwise xor) instruction

commit e92ea058184c918b20e813fe51ad00adcc26f960
Author: Marek Marecki <address@hidden>
Date:   Sun Jul 16 20:50:36 2017 +0200

    Test "bitor" (bitwise or) instruction

commit 3e01f6a942240b5ebdbb05335b3c980446f52d26
Author: Marek Marecki <address@hidden>
Date:   Sun Jul 16 20:49:46 2017 +0200

    Test arithemetic shift left

commit 99941c273a7a66dd45df9e210b1840b74b3a97db
Author: Marek Marecki <address@hidden>
Date:   Sun Jul 16 20:48:56 2017 +0200

    Change test name

commit 3de73cb4a1e7dde1343bd97689f4b96d3ca4e16c
Author: Marek Marecki <address@hidden>
Date:   Sun Jul 16 20:46:03 2017 +0200

    Add VIUA_DISASM_INVALID_RS_TYPES env var controlling how disassembler 
handles invalid RS types

commit b163d8fc9cec10ce6a3d2f181c2f1836470f3a80
Author: Marek Marecki <address@hidden>
Date:   Sun Jul 16 20:40:43 2017 +0200

    Fix correctly calculate sizes of literal bitstrings with less than 8 bits

-----------------------------------------------------------------------

Summary of changes:
 .../{arithmetic_shift_right.asm => arithmetic_shift_left.asm} |  2 +-
 sample/asm/bits/manipulation/{bitand.asm => bitor.asm}        |  6 +++---
 sample/asm/bits/manipulation/{bitand.asm => bitxor.asm}       |  6 +++---
 src/cg/disassembler/disassembler.cpp                          |  7 ++++++-
 src/cg/tools.cpp                                              |  2 +-
 tests/tests.py                                                | 11 ++++++++++-
 6 files changed, 24 insertions(+), 10 deletions(-)
 copy sample/asm/bits/manipulation/{arithmetic_shift_right.asm => 
arithmetic_shift_left.asm} (95%)
 copy sample/asm/bits/manipulation/{bitand.asm => bitor.asm} (84%)
 copy sample/asm/bits/manipulation/{bitand.asm => bitxor.asm} (84%)


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