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[Viuavm-commits] [SCM] Viua VM branch issue/e8113638/math-on-bits update


From: git
Subject: [Viuavm-commits] [SCM] Viua VM branch issue/e8113638/math-on-bits updated. v0.9.0-857-g4aba262
Date: Fri, 10 Nov 2017 23:30:56 +0100 (CET)

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The branch, issue/e8113638/math-on-bits has been updated
       via  4aba262c98a9be8c4580a7bc4bc0e5a2720d1cfc (commit)
       via  ccc0d8beec13a43d3303a659818952f17d029cf4 (commit)
       via  758342f30b55067b61af2344eb6a88f479e5710b (commit)
       via  ef51bcb67487c35ae27a0fe3f0ed8da4dcbde457 (commit)
       via  6f52804faff9c38334c76c867d8899a03061c321 (commit)
       via  32f9c493cc1a09115f928d6218a00f03cc0001ab (commit)
       via  617ba3b3fdb57954b92313a76800247871db7e83 (commit)
      from  8e31a46f30279b4f604788040bd800d95b8d5b1a (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 4aba262c98a9be8c4580a7bc4bc0e5a2720d1cfc
Author: Marek Marecki <address@hidden>
Date:   Fri Nov 10 23:30:37 2017 +0100

    Check for overflow when adding two negative values

commit ccc0d8beec13a43d3303a659818952f17d029cf4
Author: Marek Marecki <address@hidden>
Date:   Fri Nov 10 23:28:45 2017 +0100

    Do not test carry bit when checking for overflow
    
    VM is using two's complement numbers, and for negative values the test
    would always be "true" and the overflow check would fire every time an
    addition of two negative numbers was performed.

commit 758342f30b55067b61af2344eb6a88f479e5710b
Author: Marek Marecki <address@hidden>
Date:   Fri Nov 10 22:36:06 2017 +0100

    More tests for checked signed increment/decrement

commit ef51bcb67487c35ae27a0fe3f0ed8da4dcbde457
Author: Marek Marecki <address@hidden>
Date:   Fri Nov 10 22:21:14 2017 +0100

    Signed increment and decrement

commit 6f52804faff9c38334c76c867d8899a03061c321
Author: Marek Marecki <address@hidden>
Date:   Fri Nov 10 22:20:38 2017 +0100

    Yeah, right - increment and decrement have different type from the rest of 
operations

commit 32f9c493cc1a09115f928d6218a00f03cc0001ab
Author: Marek Marecki <address@hidden>
Date:   Fri Nov 10 21:29:22 2017 +0100

    Declare the rest of checked signed operations

commit 617ba3b3fdb57954b92313a76800247871db7e83
Author: Marek Marecki <address@hidden>
Date:   Fri Nov 10 21:29:01 2017 +0100

    Basic test for checked signed addition

-----------------------------------------------------------------------

Summary of changes:
 include/viua/types/bits.h                          |   6 +
 .../basic_addition.asm                             |   2 +-
 .../decrement_from_positive_to_negative.asm}       |   5 +-
 .../increment_from_negative_to_positive.asm}       |   5 +-
 .../maximum_increment.asm                          |   2 +-
 .../minimum_decrement.asm                          |   2 +-
 .../overflowing_addition.asm                       |   4 +-
 ...owing_addition_two_negatives_give_positive.asm} |  10 +-
 src/process/instr/bits.cpp                         |   6 +-
 src/types/bits.cpp                                 | 133 +++++++++++++++++++++
 tests/tests.py                                     |  29 +++++
 11 files changed, 188 insertions(+), 16 deletions(-)
 copy sample/asm/bits/arithmetic/{signed_wrapping => 
signed_checked}/basic_addition.asm (93%)
 copy sample/asm/bits/{manipulation/bitnot.asm => 
arithmetic/signed_checked/decrement_from_positive_to_negative.asm} (88%)
 copy sample/asm/bits/{manipulation/bitnot.asm => 
arithmetic/signed_checked/increment_from_negative_to_positive.asm} (88%)
 copy sample/asm/bits/arithmetic/{signed_wrapping => 
signed_checked}/maximum_increment.asm (95%)
 copy sample/asm/bits/arithmetic/{signed_wrapping => 
signed_checked}/minimum_decrement.asm (95%)
 copy sample/asm/bits/arithmetic/{signed_wrapping => 
signed_checked}/overflowing_addition.asm (89%)
 copy 
sample/asm/bits/arithmetic/{signed_wrapping/maximum_maximum_subtraction.asm => 
signed_checked/overflowing_addition_two_negatives_give_positive.asm} (81%)


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