Re: [Bug binutils/301] New: for h8s/22xx targets, range check for inline assembly "jsr" is too wide

[Nick Clifton]

Hi Alexander,

> the memory-indirect-jsr instruction 
> only allows adress values in the range of 0..255.
>
> but in inline assembly the accepted range is much wider.

I believe that this all can be traced to simple fault in the h8300.h 
header file which is allowing an extended version of the JSR instruction 
to be used for non H8300SX processors.  Please could you try out the 
attached patch and let me know if it solves the problem for you.

Cheers
  Nick

include/opcode/ChangeLog
2004-08-11  Nick Clifton  <address@hidden>

        PR/301
        * h8300.h (O_JSR): Do not allow VECIND addressing for non-SX
        processors.

Index: include/opcode/h8300.h
===================================================================
RCS file: /cvs/src/src/include/opcode/h8300.h,v
retrieving revision 1.22
diff -c -3 -p -r1.22 h8300.h
*** include/opcode/h8300.h      9 Feb 2004 12:15:57 -0000       1.22
--- include/opcode/h8300.h      11 Aug 2004 11:15:30 -0000
*************** struct h8_opcode h8_opcodes[] = 
*** 1418,1424 ****
    {O (O_JSR, SN), AV_H8SX, 0, "jsr", {{ABSJMP | L_32, E}}, {{0x5, 0xD, 0x0, 
0x8, ABSJMP | L_32, DATA7, E}}},
  
    {O (O_JSR, SN), AV_H8,   8, "jsr", {{MEMIND, E}}, {{0x5, 0xF, SRC | MEMIND, 
DATA, E}}},
!   {O (O_JSR, SN), AV_H8,   8, "jsr", {{VECIND, E}}, {{0x5, 0xD, SRC | VECIND, 
DATA, E}}},
  
    {O (O_LDC, SB), AV_H8,   2, "ldc", {{IMM8,       CCR     | DST, E}}, {{     
                      0x0, 0x7, IMM8LIST, E}}},
    {O (O_LDC, SB), AV_H8S,  2, "ldc", {{IMM8,       EXR     | DST, E}}, {{0x0, 
0x1, 0x4,  EXR | DST, 0x0, 0x7, IMM8LIST, E}}},
--- 1418,1424 ----
    {O (O_JSR, SN), AV_H8SX, 0, "jsr", {{ABSJMP | L_32, E}}, {{0x5, 0xD, 0x0, 
0x8, ABSJMP | L_32, DATA7, E}}},
  
    {O (O_JSR, SN), AV_H8,   8, "jsr", {{MEMIND, E}}, {{0x5, 0xF, SRC | MEMIND, 
DATA, E}}},
!   {O (O_JSR, SN), AV_H8SX, 8, "jsr", {{VECIND, E}}, {{0x5, 0xD, SRC | VECIND, 
DATA, E}}},
  
    {O (O_LDC, SB), AV_H8,   2, "ldc", {{IMM8,       CCR     | DST, E}}, {{     
                      0x0, 0x7, IMM8LIST, E}}},
    {O (O_LDC, SB), AV_H8S,  2, "ldc", {{IMM8,       EXR     | DST, E}}, {{0x0, 
0x1, 0x4,  EXR | DST, 0x0, 0x7, IMM8LIST, E}}},