[Bug binutils/4834] Incorrect bytemode in x86 disassembler

[ht at inter7 dot jp]

------- Additional Comments From ht at inter7 dot jp  2007-07-28 23:21 -------
(In reply to comment #2)
> Created an attachment (id=1936)
 --> (http://sourceware.org/bugzilla/attachment.cgi?id=1936&action=view)
> A patch
> 
> Could you please try this patch?

Applied your patch and tesed. All the cases I reported is now correct.

However, I found some more wrong mode insns.
It seems that EX was replaced with EXx.
EX depended on prefix to determine bytemode, whereas EXx forces XMMWORD.
I checked insns that take EXx.

% cat sse4.s
.text
.byte  0x66, 0x0f, 0x38, 0x20, 0x00
.byte  0x66, 0x0f, 0x38, 0x21, 0x00
.byte  0x66, 0x0f, 0x38, 0x22, 0x00
.byte  0x66, 0x0f, 0x38, 0x23, 0x00
.byte  0x66, 0x0f, 0x38, 0x24, 0x00
.byte  0x66, 0x0f, 0x38, 0x25, 0x00
.byte  0x66, 0x0f, 0x38, 0x30, 0x00
.byte  0x66, 0x0f, 0x38, 0x31, 0x00
.byte  0x66, 0x0f, 0x38, 0x32, 0x00
.byte  0x66, 0x0f, 0x38, 0x33, 0x00
.byte  0x66, 0x0f, 0x38, 0x34, 0x00
.byte  0x66, 0x0f, 0x38, 0x35, 0x00
.byte  0x66, 0x0F, 0x3A, 0x21, 0x00, 0x00


% objdump -dw -Mintel --section="LC_SEGMENT.__TEXT.__text" sse4.o

sse4.o:     file format mach-o-le

Disassembly of section LC_SEGMENT.__TEXT.__text:

0000000000000000 <LC_SEGMENT.__TEXT.__text>:
   0:   66 0f 38 20 00          pmovsxbw xmm0,XMMWORD PTR [eax]
   5:   66 0f 38 21 00          pmovsxbd xmm0,XMMWORD PTR [eax]
   a:   66 0f 38 22 00          pmovsxbq xmm0,XMMWORD PTR [eax]
   f:   66 0f 38 23 00          pmovsxwd xmm0,XMMWORD PTR [eax]
  14:   66 0f 38 24 00          pmovsxwq xmm0,XMMWORD PTR [eax]
  19:   66 0f 38 25 00          pmovsxdq xmm0,XMMWORD PTR [eax]
  1e:   66 0f 38 30 00          pmovzxbw xmm0,XMMWORD PTR [eax]
  23:   66 0f 38 31 00          pmovzxbd xmm0,XMMWORD PTR [eax]
  28:   66 0f 38 32 00          pmovzxbq xmm0,XMMWORD PTR [eax]
  2d:   66 0f 38 33 00          pmovzxwd xmm0,XMMWORD PTR [eax]
  32:   66 0f 38 34 00          pmovzxwq xmm0,XMMWORD PTR [eax]
  37:   66 0f 38 35 00          pmovzxdq xmm0,XMMWORD PTR [eax]
  3c:   66 0f 3a 21 00 00       insertps xmm0,XMMWORD PTR [eax],0x0


Intel SSE4 Programming Reference.pdf writes:

Opcode                  Instruction
66 0f 38 20 /r          PMOVSXBW xmm1, xmm2/m64
66 0f 38 21 /r          PMOVSXBD xmm1, xmm2/m32
66 0f 38 22 /r          PMOVSXBQ xmm1, xmm2/m16
66 0f 38 23 /r          PMOVSXWD xmm1, xmm2/m64
66 0f 38 24 /r          PMOVSXWQ xmm1, xmm2/m32
66 0f 38 25 /r          PMOVSXDQ xmm1, xmm2/m64
66 0f 38 30 /r          PMOVZXBW xmm1, xmm2/m64
66 0f 38 31 /r          PMOVZXBD xmm1, xmm2/m32
66 0f 38 32 /r          PMOVZXBQ xmm1, xmm2/m16
66 0f 38 33 /r          PMOVZXWD xmm1, xmm2/m64
66 0f 38 34 /r          PMOVZXWQ xmm1, xmm2/m32
66 0f 38 35 /r          PMOVZXDQ xmm1, xmm2/m64
66 0F 3A 21 /r ib       INSERTPS xmm1, xmm2/m32, imm8


-- 


http://sourceware.org/bugzilla/show_bug.cgi?id=4834

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