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From: | cvs-commit at gcc dot gnu.org |
Subject: | [Bug binutils/20667] [libopcodes][Aarch64] IC ivau omits register operand if it's the zero register |
Date: | Fri, 07 Oct 2016 09:57:29 +0000 |
https://sourceware.org/bugzilla/show_bug.cgi?id=20667 --- Comment #2 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jiong Wang <address@hidden>: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=362c0c4d9cc9f320d1e85755404879a13ebed91a commit 362c0c4d9cc9f320d1e85755404879a13ebed91a Author: Jiong Wang <address@hidden> Date: Fri Oct 7 10:55:56 2016 +0100 [AArch64] PR target/20667, fix disassembler for the "special" optional SYS_Rt operand for "ic"/"tlbi" gas/ PR target/20667 * testsuite/gas/aarch64/sys-rt-reg.s: Test source for instructions using SYS_Rt reg. * testsuite/gas/aarch64/sys-rt-reg.d: New testcase. opcodes/ PR target/20667 * aarch64-opc.c (aarch64_print_operand): Always print operand if it's available. -- You are receiving this mail because: You are on the CC list for the bug.
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