[Bug ld/24226] Need advise on the binutils problem that generating wrong instruction like lw a3,-2048(a5) on RISC-V backend

[liuyingying19 at huawei dot com]

https://sourceware.org/bugzilla/show_bug.cgi?id=24226

--- Comment #3 from GraceLiu <liuyingying19 at huawei dot com> ---
(In reply to Jim Wilson from comment #1)
> The medany explicit-relocs problem is different than the one here.  This
> requires an auipc to trigger, and there is no auipc here.
> 
> This looks like a compiler bug if this is compiler generated code, or a
> programmer error if this is hand written assembly code.  It is not safe to
> use
>     lw a3,%lo(g_3030+4)(a5)
> unless g_3030 has 8-byte alignment, and if it does, then the %lo can not
> overflow.
> 
> The current linker sources will give an error if it detects an auipc/lw
> overflow, but I hadn't considered this case with an incorrect lui/lw
> instruction pair.  Even though this is compiler/user error, it would still
> be useful if the linker gave an error for it instead of silently producing
> incorrect code, as finding this incorrect code after the fact is likely to
> be hard.


Thanks Jim for your comments. 
We are not using any hand written assembly code or any customized link script.
The code is generated by compiler.
The struct of g_3030 is 
#pragma pack(push)
#pragma pack(1)
struct S0 {
   signed f0 : 4;
   const volatile int64_t  f1;
   volatile signed f2 : 1;
   signed f3 : 31;
   unsigned f4 : 8;
   signed f5 : 20;
   unsigned f6 : 5;
};
#pragma pack(pop)

static const struct S0 g_3030 = {0,-9L,-0,-22553,7,-841,1};/* VOLATILE GLOBAL
g_3030 */

we tried to print the value of -9L in g_3030 but the value is wrong. I have
attached  the testcase.

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