Re: target variable expansion with included make files

[Brad Kemp]

>-- Original Message --
>To: address@hidden
>From: Boris Kolpackov <address@hidden>
>Date: Thu, 5 Aug 2004 14:49:06 +0000 (UTC)
>Subject: Re: target variable expansion with included make files
>
>
>"Brad Kemp" <address@hidden> writes:
>
>> The main makefile includes two small makefiles.
>> Each make file defines variables used in the targets of the other makefile.
>> The target names are immediatly expanded which causes the first makefile
>> not to use the variables defined in the second makefile in its target
names.
>
>That's how make works. Rules are expended as they are read.
>
>> Is there a better approach?
>
>Your example doesn't give any idea what you are trying to achieve so it's
>hard to say. Maybe if you describe actual problem we may be able to help.
>
>-boris
>
What I am trying to do is to build a project out of many sub projects.
As each sub project is updated, I want the final target pathname to reflect
the new revision level without having to change the main makefile.
This allows me to build multiple versions of the same project.
Brad