infinite loop with double-colon rule target

[grigory rybkin]

Dear GNU Make developers,
 
I am using
$ make --version
GNU Make 3.81
Copyright (C) 2006  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

This program built for i686-redhat-linux-gnu

An infinite loop occurs with the makefile
$ cat loop-double.make
testLib :: testLib.so

testLib.so : X.o
        touch $@

testLib :: testLibinstall

testLibinstall : /tmp/testLib.so

/tmp/testLib.so : testLib.so
        cp $< $@

dependencies.make : X.c
        rm -f $@
        echo X_c = X.c >> $@

-include dependencies.make

X.o : $(X_c)
        cp $< $@

.DEFAULT :
        @echo "Warning: $@: No rule for such target" >&2
        if test -n "$(MAKE_RESTARTS)" && test "$(MAKE_RESTARTS)" -gt 0; then\
         exit 1;\
         else\
         exit 0; fi
#####################################################################################################
Make fails (as it should) to rebuild the first double-colon rule target
as X.c does NOT exist
but still tries to consider apparently the second double-colon target.

$ make -f loop-double.make -d
...
Considering target file `testLib'.
Recently tried and failed to update file `testLib'.
Pruning file `testLib'.
Considering target file `testLib'.
...

Probably, Make should fail in this situation?

Thank you very much,
Grigory