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RE: Bug report for "make" documentation


From: Martin Dorey
Subject: RE: Bug report for "make" documentation
Date: Wed, 8 Oct 2008 10:39:46 -0700

I'm not sure I've understood.  Perhaps rewording the second stanza like
this would address your concern?

"However, if you use the value $(objects) in a target or prerequisite,
wildcard expansion will take place there.  If you use the value
$(objects) in a command, the shell may perform wildcard expansion when
the command runs." 

-----Original Message-----
From: address@hidden
[mailto:address@hidden On Behalf Of Harald
Bergmann
Sent: Tuesday, October 07, 2008 07:10
To: address@hidden
Subject: Bug report for "make" documentation


Dear developer,

at the PDF documentation of "make", which I currently loaded from your
web
side the following is found at top of page 25:

---
Wildcard expansion is performed by make automatically in targets and in
prerequisites.
In commands the shell is responsible for wildcard expansion. In other
contexts, wildcard
expansion happens only if you request it explicitly with the wildcard
function.
---

Some lines later at the lower half of the page there can be read:

---
Wildcard expansion does not happen when you define a variable. Thus, if
you
write this:
objects = *.o
then the value of the variable objects is the actual string '*.o'.
However,
if you use the
value of objects in a target, prerequisite or command, wildcard
expansion
will take place
at that time.
---

Even with the time relation told at the end both statements are
contradictory.

Probably the shell will expand as expected, but one can not be sure at
this
point. At least it will happen lately and not at "that time".

Many thanks for your great software!

Best regards,
Harald Bergmann




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